MT93L04 Zarlink Semiconductor, MT93L04 Datasheet - Page 9

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MT93L04

Manufacturer Part Number
MT93L04
Description
128-channel Voice Echo Canceller
Manufacturer
Zarlink Semiconductor
Datasheet

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Pin Description (continued)
Test_En_d2
RESETB_d2
IRQB_d2
CSB_d2
R/WB_d2
DTAB_d2
D(2)_d2
D(3)_d2
DSB_d2
D(0)_d2
D(1)_d2
D(4)_d2
D(5)_d2
D(6)_d2
D(7)_d2
Signal Name
ICO
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Signal Type
BGA Ball #
W5
W6
W7
W8
Y4
U5
Y5
U6
Y6
Y7
Y8
V8
Zarlink Semiconductor Inc.
V5
V6
V7
MT93L04
9
Internal Connection. Connected to VSS for
normal operation
Device Reset (Schmitt Trigger Input). An active
low resets the device and puts the MT93L00 into a
low-power stand-by mode.
When the RESET pin is returned to logic high
and a clock is applied to the MCLK pin, the
device will automatically execute initialization
routines, which preset all the Control and Status
Registers to their default power-up values.
Interrupt Request (Open Drain Output). This
output goes low when an interrupt occurs in any
channel. IRQ returns high when all the interrupts
have been read from the Interrupt FIFO Register.
A pull-up resistor (1 K typical) is required at this
output.
Data Strobe (Input). This active low input works
in conjunction with CS to enable the read and
write operations.
Chip Select (Input). This active low input is used
by a microprocessor to activate the
microprocessor port.
Read/Write (Input). This input controls the
direction of the data bus lines (D7-D0) during a
microprocessor access.
Data Transfer Acknowledgment (Open Drain
Output). This active low output indicates that a
data bus transfer is completed. A pull-up resistor
(1 K typical) is required at this output.
Data Bus D0 - D7 (Bidirectional). These pins
form the 8-bit bidirectional data bus of the
microprocessor port.
Signal Description
Data Sheet

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