MT8910 Zarlink Semiconductor, MT8910 Datasheet - Page 2

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MT8910

Manufacturer Part Number
MT8910
Description
Digital Subscriber Line Interface Circuit
Manufacturer
Zarlink Semiconductor
Datasheet

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Features
Applications
CDSTi
CDSTo
MRST
NT/LT
DSTi
F0od
DSTo
Compatible with ISDN U-Interface standard
Over 40dB (
Full duplex transmission over single twisted pair
Advanced echo cancelling technology
High performance 2B1Q line code
Full activation/deactivation state machine
QSNR and line attenuation diagnostics
Frame and superframe synchronization
On-chip 15 second timer
Insertion loss measurement test signal & quiet
mode
Mitel ST-BUS compatible
Single 5V power supply
Pair gain system
ISDN NT1 and NT2 DSL interface
Digital PABX line cards and telephone sets
Digital multiplexers and concentrators
MS0
MS1
C4b
F0b
SFb
RECEIVE TIMING
VSS
Control
Register
@
& CONTROL
INTERFACE
TRANSMIT/
Interface
40 kHz) of loop attenuation
Transmit
Interface
Receive
AVSS
Register
Status
VDD
AVDD
Maintenance
Descrambler,
Diagnostics
& Encoder
Scrambler
Decoder &
Framing
Figure 1 - Functional Block Diagram
&
Quantizer
OSC2
Feedback
Equalizer
Decision
Digital Subscriber Line Interface Circuit
Compen-
sator
CMOS ST-BUS
Jitter
Description
The MT8910-1 Digital Subscriber Line Interface
Circuit (DSLIC) is designed to provide ISDN basic
rate access (2B+D) at the U-interface. Full duplex
digital transmission at 160 kbit/s on a single twisted
pair is achieved using echo cancelling hybrid (ECH)
technology.
performance 2B1Q line code, allows the DSLIC to
meet the loop length requirements of the digital
subscriber loops at the U-interface over the entire
non-loaded telephone loop plant.
The MT8910-1 is compatible with the complete
range of Mitel Semiconductor ISDN components
through the use of the ST-BUS interface.
OSC1
Canceller
Linear
MT8910-1AE
MT8910-1AP
Echo
TSTin TSTout TSTen VRef VBias
Adaptation
Timing
Circuit
This, in conjunction with the high
DAC and
Compen-
Tx Filter
Linear
Ordering Information
Non-
sator
-40 C to +85 C
FAMILY
28 Pin PDIP
44 Pin PLCC
ISSUE 2
2nd Order
PDM ADC
Digital Filter
Voltage Ref.
Detector
Tone
Bias &
FIR
+
-
MT8910-1
March 1997
Lout+
Lout-
Lin+
Lin-
9-3

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