ADC1006S070 NXP Semiconductors, ADC1006S070 Datasheet
ADC1006S070
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ADC1006S070 Summary of contents
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ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz Rev. 02 — 12 August 2008 1. General description The ADC1006S055/070 are a family of Bipolar CMOS (BiCMOS) 10-bit Analog-to-Digital Converters (ADC) optimized for a wide range of ...
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... MHz; clk f = 400 kHz i differential non-linearity MHz; clk f = 400 kHz i (no missing code guaranteed) maximum clock ADC1006S055H frequency ADC1006S070H total power dissipation MHz; clk MHz 1.75 mm Rev. 02 — 12 August 2008 ADC1006S055/070 www.DataSheet4U.com = V37 to V38 and CCD = 1.9 V ...
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... NXP Semiconductors 6. Block diagram n.c. FSREF VREF sample - and - hold INN IN SH CMADC DEC Fig 1. Block diagram ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz CLKN CLK CCA1 CCA3 CCA4 10, 13, 14, 16, 31, 32 CLOCK DRIVER ...
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... NXP Semiconductors 7. Pinning information 7.1 Pinning Fig 2. Pin configuration 7.2 Pin description Table 3. Symbol CMADC V CCA1 V CCA3 AGND3 DEC n.c. n.c. n.c. n.c. n.c. VREF FSREF n.c. n.c. V CCD2 n.c. DGND2 ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz CMADC CCA1 3 V CCA3 AGND3 4 DEC 5 ADC1006S055/070 n ...
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... NXP Semiconductors Table 3. Symbol OTC n.c. n.c. V CCO OGND CLKN CLK V CCD1 DGND1 SH AGND4 V CCA4 IN INN AGND1 8. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V CCA V CCD V CCO i(IN) V i(INN) ...
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... NXP Semiconductors Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol V i(clk)(p- stg T amb T j [1] The supply voltages V the supply voltage differences V 9. Thermal characteristics Table 5. Symbol R th(j-a) 10. Characteristics Table 6. Characteristics V44 and V41 to V40 = 4. 5. ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter Conditions V HIGH-level input PECL mode ...
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... V and V Switching characteristics; Clock frequency f f minimum clock SH = HIGH clk(min) frequency f maximum clock ADC1006S055H clk(max) frequency ADC1006S070H t HIGH clock pulse f w(clk)H i width t LOW clock pulse f w(clk)L i width Analog signal processing clock duty factor; V Linearity ...
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... Total harmonic distortion THD total harmonic ADC1006S055H (f distortion ADC1006S070H ( Thermal noise N RMS thermal noise shorted input HIGH; th(RMS) f clk ADC1006S055_070_2 Product data sheet = V37 to V38 and V15 to V17 = 4. 5.25 V; CCD 1. 1.6 V ...
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... ADC1006S070H ( [7] Effective number of bits ENOB effective number of ADC1006S055H (f bits ADC1006S070H ( Intermodulation MHz MHz) clk i intermodulation IM suppression IMD3 third-order intermodulation distortion Bit error rate ( MHz) clk BER ...
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... NXP Semiconductors Table 6. Characteristics …continued V44 and V41 to V40 = 4. 5. CCA V = V33 to V34 = 3 3.6 V; AGND and DGND shorted together; T CCO 1 I(IN)(p-p) I(INN)(p-p) VREF and and C CCO amb Symbol Parameter Conditions [9] Timing ( pF sampling delay time ...
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... NXP Semiconductors 11. Additional information relating to Table 7. Code Underfl 511 1022 1023 Overflow [1] Two’s complement reference is inverted MSB. Table 8. OTC 0 1 [ don’t care. Table ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz Table 6 Output coding with differential inputs (typical values to AGND) ...
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... NXP Semiconductors CLK DATA Fig 3. Timing diagram (1) frequency on pin CE = 100 kHz. Fig 4. Timing diagram and test conditions of 3-state output delay time ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz sample N sample w(clk)H t w(clk)L sample N sample ...
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... NXP Semiconductors 9.70 ENOB (bit) 9.60 (1) 9.50 (2) 9.40 9. (1) 55 MHz. (2) 70 MHz. Fig 5. Effective Number Of Bits (ENOB function of input frequency (sample device) 73 SFDR (dB (1) 55 MHz. (2) 70 MHz. Fig 7. Spurious Free Dynamic Range (SFDR function of input frequency (sample device) ...
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... NXP Semiconductors 0 power spectrum (dB 120 160 0 5 Fig 9. Single-tone MHz power spectrum (dB 120 160 0 5 Fig 10. Two-tone MHz ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz MHz clk 20.1 MHz MHz ...
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... NXP Semiconductors 1.00 output range (INL) 0.60 0.20 0.20 0.60 0 Fig 11. Integral Non-Linearity (INL) 0.30 DNL (LSB) 0.20 0.10 0 0.10 0.20 0 Fig 12. Differential Non-Linearity (DNL) ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz 256 512 256 512 Rev. 02 — 12 August 2008 ADC1006S055/070 www.DataSheet4U.com 014aaa450 768 1024 output code ...
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... NXP Semiconductors 80 SFDR (dBFS ( 4.43 MHz MHz. i (3) SFDR = 80 dB. Fig 13. SFDR as a function of input amplitude SFDR (dBFS) 60 (1) 40 ( 4.43 MHz MHz. i (3) SFDR = 80 dB. Fig 14. SFDR as a function of input amplitude; V ...
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... NXP Semiconductors 75 (dB 1.3 1.4 1.5 1.6 1.7 1 CCA VREF (1) SFDR. (2) ENOB. (3) S/N. Fig 15. SFDR, ENOB and S function MHz; f CCA VREF clk ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz 10.0 (bit) V I(IN)(p-p) (1) 9.5 V (2) I(INN)(p-p) (V) 9.0 8.5 (3) 8.0 7.5 7.0 6.5 6.0 1.9 2.0 2.1 2.2 (V) 014aaa455 Fig 16. ADC full-scale ...
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... NXP Semiconductors 12. Application information 12.1 Application diagrams 220 nF 100 The analog, digital and output supplies should be separated and decoupled. Fig 17. Application diagram Fig 18. Application diagram for differential clock input PECL compatible using a TTL to PECL translator ADC1006S055_070_2 Product data sheet Single 10 bits ADC MHz or 70 MHz ...
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... NXP Semiconductors Fig 19. Application diagram for TTL single-ended clock ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz CLKN ADC1006S 055/070 CLK TTL input 014aaa459 Rev. 02 — 12 August 2008 www.DataSheet4U.com © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 12.2 Demonstration board B11 CLK2 330 FL3 C13 100 nF R3 100 J3 CLK1 CLK1 C19 V CCD CCA S5 C17 TR1 CMADC J1 220 100 100 MCLT1_6T_KK81 C8 S1 330 BYD17G GND ...
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... NXP Semiconductors Fig 21. Component placement (top side) Fig 22. Component placement (underside) ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz TR1 R9 C7 C14 FL4 C10 B7 IC1 TM3 C11 TP2 ...
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... NXP Semiconductors Fig 23. Printed-circuit board layout (top layer) Fig 24. Printed-circuit board layout (ground layer) ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz 1 2 Rev. 02 — 12 August 2008 www.DataSheet4U.com 014aaa461 014aaa462 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors Fig 25. Printed-circuit board layout (power plane) 12.3 Alternative parts The following alternative parts are also available: Table 10. Type number ADC1206S040 ADC1206S055 ADC1206S070 [1] Pin to pin compatible 12.4 Recommended companion chip The recommended companion chip is the TDA9901 wideband differential digital controlled variable gain amplifier. ...
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... NXP Semiconductors 13. Support information 13.1 Definitions 13.1.1 Non-linearities 13.1.1.1 Integral Non-Linearity (INL defined as the deviation of the transfer function from a best fit straight line (linear regression computation). The INL of the code i is obtained from the equation: INL i = where slope of the ideal straight line = code width code value. ...
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... NXP Semiconductors Remark: In the following equations, P effects of random noise, non-linearities, sampling time errors, and ‘quantization noise’. 13.1.2.1 Signal-to-Noise And Distortion (SINAD) The ratio of the output signal power to the noise and distortion power for a given sample rate and input frequency, excluding the DC component: SINAD dB 13 ...
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... NXP Semiconductors 13.1.3 Intermodulation distortion 13.1.3.1 Spectral analysis (dual-tone) magnitude Fig 27. Spectral analysis (dual-tone) From a dual-tone input sinusoid (f the coherence criterion), the intermodulation distortion products IMD2 and IMD3 (respectively, 2nd and 3rd-order components) are defined, as follows. 13.1.3.2 IMD2 (IMD3) The ratio of the RMS value of either tone to the RMS value of the worst second (third) order intermodulation product ...
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... NXP Semiconductors 14. Package outline QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.85 0.4 mm 2.1 0.25 0.05 1.65 0.2 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date ADC1006S055_070_2 20080812 • Modifications: Corrections made to titles in • Corrections made to note in ADC1006S055_070_1 20080611 ADC1006S055_070_2 Product data sheet ADC1006S055/070 Single 10 bits ADC MHz or 70 MHz Data sheet status Change notice ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Thermal characteristics Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 Additional information relating to 12 Application information 12.1 Application diagrams . . . . . . . . . . . . . . . . . . . 19 12 ...