PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 31

• Manufacturer Part Number: PIC16C926-I/CL
• Description: 64/68-Pin CMOS Microcontrollers with LCD Driver
• Manufacturer: Microchip Technology

4.0
Some pins for these ports are multiplexed with an alter-
nate function for the peripheral features on the device.
In general, when a peripheral is enabled, that pin may
not be used as a general purpose I/O pin.
4.1
The RA4/T0CKI pin is a Schmitt Trigger input and an
open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All RA pins
have data direction bits (TRISA register), which can
configure these pins as output or input.
Setting a bit in the TRISA register puts the correspond-
ing output driver in a Hi-Impedance mode. Clearing a
bit in the TRISA register puts the contents of the output
latch on the selected pin.
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified, and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The other PORTA
pins are multiplexed with analog inputs and the analog
V
clearing/setting the control bits in the ADCON1 register
(A/D Control Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 4-1:
BCF
BCF
CLRF
BSF
MOVLW
MOVWF
REF
Note:
2001 Microchip Technology Inc.
input. The operation of each pin is selected by
I/O PORTS
PORTA and TRISA Register
STATUS, RP0
STATUS, RP1
PORTA
STATUS, RP0
0xCF
TRISA
On a Power-on Reset, these pins are con-
figured as analog inputs and read as ’0’.
INITIALIZING PORTA
; Select Bank0
; Initialize PORTA
; Select Bank1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
; RA<7:6> are always
; read as ’0’.
Preliminary
FIGURE 4-1:
FIGURE 4-2:
Data
Bus
WR
Port
WR
TRIS
RD
TRIS
RD Port
To A/D Converter
Note 1: I/O pins have protection diodes to V
Note 1: I/O pin has protection diodes to V
TMR0 Clock Input
WR
TRIS
RD
TRIS
RD Port
Data
Bus
WR
Port
TRIS Latch
D
Data Latch
D
CK
CK
Data Latch
TRIS Latch
PIC16C925/926
D
D
CK
CK
Q
Q
Q
Q
Q
Q
Q
Q
BLOCK DIAGRAM OF
PINS RA3:RA0 AND RA5
BLOCK DIAGRAM OF
RA4/T0CKI PIN
Q
Q
Input Mode
Analog
EN
Schmitt
Trigger
Input
Buffer
EN
EN
D
D
DS39544A-page 29
V
N
SS
V
V
P
N
SS
DD
SS
DD
only.
I/O pin
TTL
Input
Buffer
and V
I/O pin
SS
(1)
(1)
.