PIC16C926-I/CL Microchip Technology, PIC16C926-I/CL Datasheet - Page 65
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PIC16C926-I/CL
Manufacturer Part Number
PIC16C926-I/CL
Description
64/68-Pin CMOS Microcontrollers with LCD Driver
Manufacturer
Microchip Technology
Datasheet
1.PIC16C926-ICL.pdf
(182 pages)
- Current page: 65 of 182
- Download datasheet (4Mb)
The SS pin allows a Synchronous Slave mode. The
SPI must be in Slave mode (SSPCON<3:0> = 04h)
and the TRISA<5> bit must be set for the Synchro-
nous Slave mode to be enabled. When the SS pin
is low, transmission and reception are enabled and
the SDO pin is driven. When the SS pin goes high,
the SDO pin is no longer driven, even if in the mid-
dle of a transmitted byte and becomes a floating
output. External pull-up/pull-down resistors may be
desirable, depending on the application.
FIGURE 9-3:
FIGURE 9-4:
SCK (CKP = 0,
SCK (CKP = 0,
SCK (CKP = 1,
SCK (CKP = 1,
SDO
SDI (SMP = 0)
SCK (CKP = 0)
SCK (CKP = 1)
SDI (SMP = 1)
2001 Microchip Technology Inc.
SS (optional)
SDO
SDI (SMP = 0)
SSPIF
SSPIF
CKE = 0)
CKE = 1)
CKE = 0)
CKE = 1)
SPI MODE TIMING, MASTER MODE
SPI MODE TIMING (SLAVE MODE WITH CKE = 0)
bit7
bit7
bit7
bit7
bit7
bit6
bit6
Preliminary
bit5
bit5
bit4
bit4
To emulate two-wire communication, the SDO pin can
be connected to the SDI pin. When the SPI needs to
operate as a receiver, the SDO pin can be configured
as an input. This disables transmissions from the SDO.
The SDI can always be left as an input (SDI function)
since it cannot create a bus conflict.
Note 1: When the SPI is in Slave mode with SS
bit3
bit3
2: If the SPI is used in Slave mode with
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to V
CKE = ’1’, then the SS pin control must be
enabled.
PIC16C925/926
bit2
bit2
DD
.
bit1
bit1
DS39544A-page 63
bit0
bit0
bit0
bit0
bit0
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