MT28F008B5 Micron Technology, MT28F008B5 Datasheet - Page 15
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MT28F008B5
Manufacturer Part Number
MT28F008B5
Description
(MT28F008B5 / MT28F800B5) FLASH MEMORY
Manufacturer
Micron Technology
Datasheet
1.MT28F008B5.pdf
(30 pages)
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DataSheet
Notes: 1. Sequence may be repeated for additional BYTE or WORD WRITEs.
8Mb Smart 5 Boot Block Flash Memory
MT28F800B5_3.fm - Rev. 3, Pub. 8/2002
4
U
.com
SELF-TIMED WRITE SEQUENCE
2. Complete status check is not required. However, if SR3 = 1, further WRITEs are inhibited until the status register
3. Device will be in status register read mode. To return to the array read mode, the FFh command must be issued.
4. If SR3 is set during a WRITE or BLOCK ERASE attempt, CLEAR STATUS REGISTER must be issued before further
5. Status register bits 3-5 must be cleared using CLEAR STATUS REGISTER.
(WORD OR BYTE WRITE)
is cleared.
WRITE or ERASE operations are allowed by the CEL.
WRITE Word or Byte
WRITE 40h or 10h
STATUS REGISTER
WRITE Complete
Check (optional)
Complete Status
Address/Data
SR7 = 1?
V
READ
Start
PP
= 5V
YES
2
3
NO
1
DataSheet4U.com
SMART 5 BOOT BLOCK FLASH MEMORY
15
Start (WRITE completed)
Micron Technology, Inc. Reserves the right to change products or specifications without notice.
WRITE Successful
STATUS-CHECK SEQUENCE
SR3 = 0?
SR4 = 0?
COMPLETE WRITE
YES
YES
NO
NO
V
BYTE/WORD WRITE Error
PP
Error
4, 5
©2002, Micron Technology Inc.
8Mb
5