MT28F160A3 Micron Technology, MT28F160A3 Datasheet - Page 10

• Manufacturer Part Number: MT28F160A3
• Description: FLASH MEMORY
• Manufacturer: Micron Technology

DataSheet4U.com
www.DataSheet4U.com
DataSheet
NOTE: 1. After a PROGRAM/ERASE command is issued and confirmed, status bit SR7 goes LOW to indicate that the operation is
1 Meg x 16 Enhanced Boot Block Flash Memory
MT28F160A3_3.p65 – Rev. 3, Pub. 8/01
STATUS
4
BIT #
U
SR7
SR6
SR5
SR4
SR3
SR2
SR1
SR0
.com
2. When an ERASE SUSPEND command is issued, the WSM halts execution and sets SR6 = 1, indicating that the ERASE
3. During an ERASE error, the SR5 bit is set (SR5 = 1), while SR5 = 0 indicates that a successful block erasure has occurred.
4. If the WSM is unable to program the addressed location correctly, the SR4 bit is set (SR4 = 1) and
5. During a PROGRAM SUSPEND command, the WSM halts execution and the SR2 bit is set, indicating that the PRO-
6. A proper block address must be provided in an ERASE operation. If that addressed block is protected, then the SR1 bit
in progress. If SR7 = 1 (ready), other polling operations can be performed. Until this occurs, the other status bits are
not valid. SR7 is not updated automatically at the completion of a WSM task; therefore, if the WSM status bit shows
busy (0), OE# and CE# must be toggled periodically to determine when the WSM has completed an operation (SR7 =
1).
operation has been suspended. The WSM status bit is also set to HIGH (SR7 = 1), indicating that the ERASE SUSPEND
operation has been completed successfully.
SR4 = 0 indicates that a successful programming operation has occurred at the addressed block location. Information
concerning the status of V
PROGRAM/ERASE command has been issued, SR3 is set to a “1,” indicating that the PROGRAM/ERASE operation has
aborted due to a low V
GRAM operation has been suspended. This bit remains ”1” until a PROGRAM RESUME command is issued. The WSM
status bit is also set to HIGH (SR7 = 1), indicating that the PROGRAM SUSPEND operation has been completed
successfully.
is set (SR1 = 1) when WP# = V
STATUS REGISTER BIT
WRITE STATE MACHINE STATUS (WSM)
1 = Ready
0 = Busy
ERASE SUSPEND STATUS
1 = ERASE SUSPEND
0 = ERASE in progress or
ERASE STATUS
1 = BLOCK ERASE error
0 = BLOCK ERASE successful
PROGRAM STATUS
1 = PROGRAM error
0 = PROGRAM successful
V
1 = Program abort V
0 = V
PROGRAM SUSPEND STATUS
1 = PROGRAM suspended
0 = PROGRAM in progress or
BLOCK LOCK STATUS
1 = Block locked
0 = Block not locked
RESERVED
PP
STATUS
ERASE complete
PROGRAM complete
PP
good
PP
PP
.
range error
PP
during programming/erasure is provided by SR3. If V
IL
. If that block is not protected, then SR1 = 0.
ENHANCED BOOT BLOCK FLASH MEMORY
Status Register
DESCRIPTION
If SR7 = 0 (busy), the WSM has not completed an ERASE or
PROGRAM operation. If SR7 = 1 (ready), other operations can be
If SR6 = 1, WSM halts execution, indicating that the ERASE
operation has been suspended. SR6 remains “1” until an ERASE
SR5 = 0 indicates that a BLOCK ERASE has been successful. SR5 = 1
indicates that an erase has failed; therefore, the WSM has completed
the maximum allowable erase pulses determined by the internal
algorithm but which were insufficient to completely erase the device.
SR4 = 0 indicates successful programming has occurred at the
address location. SR4 = 1 indicates the WSM was unable to
correctly program the addressed location.
SR3 provides status of V
If SR2 = 1, WSM halts execution, indicating the PROGRAM
operation has been suspended. SR2 stays “1” until a PROGRAM
RESUME command is issued.
SR1 = 1 indicates that the address block is locked when WP# = V
Any attempt to program/erase this block will abort the operation
and the device will return to read status mode.
performed.
RESUME command is issued.
DataSheet4U.com
Table 4
10
Micron Technology, Inc., reserves the right to change products or specifications without notice.
PP
during programming.
PP
is lower than V
1 MEG x 16
PPLK
©2001, Micron Technology, Inc.
after a
ADVANCE
IL
.