MT9V012 Micron, MT9V012 Datasheet - Page 12

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MT9V012

Manufacturer Part Number
MT9V012
Description
1/6-Inch VGA CMOS Digital Image Sensor
Manufacturer
Micron
Datasheet

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Table 3:
Table 4:
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
Parameter
Parameter
HBLANK_REG
VBLANK_REG
PIXCLK_PERIOD Pixel Clock Period
S
A
P
Q
A + Q
V
Nrows * (A+Q)
F
V’
F’
Frame Time
Frame—Long Integration Time
Vertical Blanking (long integration
time)
Total Frame Time (long integration
time)
Horizontal Blanking Register
Vertical Blanking Register
Skip Factor
Active Data Time
Frame Start/End Blanking
Horizontal Blanking
Row Time
Vertical Blanking
Frame Valid Time
Total Frame Time
The sensor timing (Table 3) is shown in terms of pixel clock and master clock cycles (see
Figure 8 on page 11). The recommended master clock frequency is 27 MHz. The vertical
blanking and total frame time equations assume that the number of integration rows
(Reg0x09) is less than the number of active rows, plus blanking rows (Reg0x03 +
VBLANK_REG). If this is not the case, the number of integration rows must be used
instead, to determine the frame time, as shown in Table 4.
Name
Name
Reg0x07 if Reg0xC8[0] = 0
Reg0x05 if Reg0xC8[0] = 1
Reg0x8 if Reg0xC8[1] = 0
Reg0x6 if Reg0xC8[1] = 1
Reg0x0A[2:0] * 2
For skip 2x mode: S = 2
For skip 4x mode: S = 4
otherwise, S = 1
(Reg0x04/S) * PIXCLK_PERIOD
6 * PIXCLK_PERIOD
HBLANK_REG * PIXCLK_PERIOD
((Reg0x04/S) + HBLANK_REG) * PIXCLK_PERIOD 884 pixel clocks
VBLANK_REG * (A + Q) + (Q - 2*P)
(Reg0x03/S) * (A + Q) - (Q - 2*P)
((Reg0x03/S) + VBLANK_REG) * (A + Q)
MT9V012 - 1/6-Inch VGA CMOS Digital Image Sensor
(Reg0x09 – (Reg0x03)/S)) * (A + Q) + (Q - 2*P) 25,868 pixel clocks
(Reg0x09) * (A + Q)
12
Equation (master clock)
Equation
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Output Data Format (Default Mode)
©2004 Micron Technology, Inc. All rights reserved.
0xF4 = 244 pixels
0x1D = 29 rows
1 pixel clock
= 2 master
= 37.04ns
1
640 pixel clocks
= 1,280 master
= 47.41µs
6 pixel clocks
= 12 master
= 0.44µs
244 pixel clocks
= 488 master
= 18.07µs
= 1,768 master
= 65.48µs
25,868 pixel clocks
= 51,736 master
= 1.91ms
424,088 pixel clocks
= 848,176 master
= 31.41ms
449,956 pixel clocks
= 899,912 master
= 33.33ms
= 51,736 master
= 1.91ms
449,956 pixel clocks
= 899,912 master
= 33.33ms
Default Timing
Default Timing
at 27 MHz
Preliminary

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