MT9V012 Micron, MT9V012 Datasheet - Page 25

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MT9V012

Manufacturer Part Number
MT9V012
Description
1/6-Inch VGA CMOS Digital Image Sensor
Manufacturer
Micron
Datasheet

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Table 6:
PDF: 814eb99f/Source: 8175e929
MT9V012_2.fm - Rev. B 2/05 EN
0x20 (32) Read Mode - Context B
Bit
10
12
13
15
7
8
9
0
1
2
3
4
5
Inhibit Standby
Show Bad
Frames
Restart Bad
Frames
Toggle S
Reserved
Reserved
Synchronize
Changes
Mirror Rows
Mirror Columns
Row Skip 2x—
Context B
Column Skip
2x—Context B
Row Skip 4x
Column Skip 4x
Register Description (continued)
ADDR
By default, asserting STANDBY places the sensor in a low-
power state. Setting this bit stops STANDBY from affecting
entry to or exit from the low-power state. See “Power
Saving Modes” on page 42.
By default, the sensor only shows good frames. When this bit
is set, all frames are output.
When this bit is set, a restart is forced any time a bad frame
is detected. This can shorten the delay when waiting for a
good frame, since the delay for masking out a bad frame
will be the integration time rather than the full frame time.
By default, the sensor serial bus will respond to addresses
0xBA/0xBB. When this bit is set, the sensor serial bus will
respond to addresses 0x90/0x91. Writes to this bit are
ignored when STANDBY is asserted. See “Slave Address” on
page 16.
Reserved.
Reserved.
By default, the update for many registers is synchronized to
frame start. Setting this bit inhibits this update; register
changes will remain pending until this bit is returned to “0.”
When this bit is returned to “0,” all pending register updates
will be made on the next frame start.
Rows read out from bottom to top (upside down). When set,
row readout starts from row (Row Start + Row Size) and
continues down to (Row Start + 1). When clear, readout
starts at row start and continues to (Row Start + Row Size -
1). This ensures that the starting color is maintained.
Columns read out from right to left (mirrored). When set,
column readout starts from column (Col Start + Col Size) and
continues down to (Col Start + 1). When clear, readout starts
at col start and continues to (Col Start + Col Size - 1). This
ensures that the starting color is maintained.
When read mode for context B is selected (Reg0xC8[3] = 1):
1 = read out two rows, skip two rows (i.e. row 8, row 9, row
12, row 13…).
0 = normal readout.
When read mode for context B is selected (Reg0xC8[3] = 1):
1 = read out two columns, skip two columns (as with rows).
0 = normal readout.
1 = read out two rows, skip six rows (i.e. row 8, row 9, row
16, row 17…).
0 = normal readout.
1 = read out two columns, skip six columns (as with rows).
0 = normal readout.
Bit Description
MT9V012 - 1/6-Inch VGA CMOS Digital Image Sensor
25
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Default
(hex)
0
0
0
0
0
0
0
0
0
0
0
0
0
©2004 Micron Technology, Inc. All rights reserved.
to Frame
Sync’d
Start
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Preliminary
Registers
Frame
Bad
YM
YM
YM
YM
YM
YM
N
Y
N
N
N

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