MT9V403 Micron, MT9V403 Datasheet - Page 19

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MT9V403

Manufacturer Part Number
MT9V403
Description
1/2-INCH VGA (WITH FREEZE-FRAME) CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR
Manufacturer
Micron
Datasheet

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0
sor but the same basic rules apply; the row time is still
always 671 clock cycles. Figure 25 provides a slave
mode row timing example for windowing from column
100 to column 200. The row processing is initiated by
raising ROW_STRT and requires 671 clock cycles to
complete. The user can readout the desired window of
columns by lowering LD_SHFT_N and the specified
columns will appear on the output with a 3.5 SYSCLK
09005aef80c07280
MT9V403_DS.fm - Rev. B 1/04 EN
In slave mode the user has more control of the sen-
FRAME_SYNC_N
LD_SHFT_N
ROW_STRT
DATA [9:0]
(output)
(input)
(input)
(input)
LD_SHFT_N
ROW_STRT
Figure 26: Frame Timing for Slave Mode with Windowing
DATA [9:0]
Figure 25: Row Timing for Slave Mode with Windowing
(output)
SYSCLK
(input)
(input)
(input)
Start
Row
Row
400
Row
300
1
Row
301
Row
302
3.5 SYSCLK DELAY
Row
303
XXX
1/2-INCH VGA (WITH FREEZE-FRAME) CMOS
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Row
395
Column
Start
100
Row
396
ACTIVE-PIXEL DIGITAL IMAGE SENSOR
101
Row
397
19
102
Row
398
delay. Even though the windowed columns can be
readout at the beginning of a row, the user must still
wait the required 671 clock cycles for the row process-
ing to complete before initiating the processing of the
next row with ROW_STRT. Figure 26 provides a slave
mode frame timing example for windowing from row
300 to row 400 which—similar to the master mode—
shows how changing the number of rows in a window
will increase the frame rate.
Stop
Row
Row
399
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
199
Row
Column
400
Stop
200
Row
300
Row
301
Row
302
Row
303
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671
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Row
395
1
Row
396
©2004 Micron Technology. Inc.
Row
397
Row
398
Row
399

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