SSTUH32866 Philips Semiconductors, SSTUH32866 Datasheet - Page 10

• Manufacturer Part Number: SSTUH32866
• Description: 1.8 V high output drive 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 3:
L = LOW voltage level; H = HIGH voltage level; X = don’t care;
[1]
Table 4:
L = LOW voltage level; H = HIGH voltage level; X = don’t care;
[1]
[2]
[3]
[4]
9397 750 14199
Product data sheet
RESET
RESET
Q
H
H
H
H
H
H
H
H
H
H
PPO
Data inputs = D2, D3, D5, D6, D8 to D25 when C0 = 0 and C1 = 0.
Data inputs = D2, D3, D5, D6, D8 to D14 when C0 = 0 and C1 = 1.
Data inputs = D1 to D6, D8 to D10, D12, D13 when C0 = 1 and C1 = 1.
PAR_IN arrives one clock cycle (C0 = 0), or two clock cycles (C0 = 1), after the data to which it applies.
This condition assumes QERR is HIGH at the crossing of CK going HIGH and CK going LOW. If QERR is LOW, it stays latched LOW for
two clock cycles or until RESET is driven LOW.
L
H
H
H
H
H
H
H
H
H
H
H
H
L
0
is the previous state of the associated output.
0
is the previous state of output PPO; QERR
Function table (each flip-flop)
Parity and standby function table
X or floating X or floating X or floating X or floating
X or floating
DCS
DCS
H
H
H
H
H
X
L
L
L
L
7.1 Function table
H
H
H
H
H
H
L
L
L
L
L
L
X or floating
CSR
CSR
X
X
X
X
H
X
L
L
L
L
H
H
H
H
H
H
L
L
L
L
L
L
Inputs
X or floating
L or H
CK
L or H
L or H
L or H
L or H
Inputs
CK
0
1.8 V high-drive DDR2 configurable registered buffer with parity
is the previous state of output QERR.
Rev. 01 — 13 May 2005
X or floating
L or H
CK
L or H
L or H
L or H
L or H
CK
= LOW-to-HIGH transition;
= LOW-to-HIGH transition;
X or floating
(D1 to D25)
of inputs = H
Dn, DODTn,
X or floating
DCKEn
even
even
even
even
odd
odd
odd
odd
X
X
H
X
H
X
H
X
H
X
L
L
L
L
X or floating
PAR_IN
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Qn
Q
Q
Q
Q
Q
Q
H
H
H
L
L
L
L
0
0
0
0
0
0
H
H
H
H
X
L
L
L
L
X
SSTUH32866
= HIGH-to-LOW transition
= HIGH-to-LOW transition
[2]
Outputs
QCS
PPO
PPO
PPO
Q
Q
Q
Q
H
H
H
H
L
L
L
L
L
0
0
0
0
H
H
H
H
L
L
L
L
L
www.DataSheet4U.com
Outputs
[3]
0
0
[1]
QERR
QODT,
QERR
QERR
QCKE
[1]
Q
Q
Q
Q
H
H
H
H
10 of 28
L
L
L
L
L
H
H
H
H
H
L
L
L
L
0
0
0
0
[4]
0
0