D75116GF NEC, D75116GF Datasheet - Page 8

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D75116GF

Manufacturer Part Number
D75116GF
Description
Search -----> UPD75116GF
Manufacturer
NEC
Datasheet

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8
3.2 Non-Port Pins
PTH00 to PTH03
TI0
TI1
PTO0
PTO1
SCK
SO
SI
INT4
INT0
INT1
INT2
INT3
PCL
X1, X2
RESET
NC*2
V
V
PD75112(A), 75116(A)
DD
SS
* 1: Circles indicate Schmitt trigger inputs.
2: When the PWB is shared with the PD75P116, connect the NC pin to V
Input/Output
Input/output
Input/output
Input/output
Input/output
Input
Input
Input
Input
Input
Input
Input
Function
Dual
P20
P21
P01
P02
P03
P00
P10
P11
P12
P13
P22
Pin
Threshold voltage ariable 4-bit analogy input port.
External event pulse input for the timer/event counter or edge
detect vector interrupt input. 1-bit input enable.
Timer/event counter output.
Serial clock input/output.
Serial data output.
Serial data input.
Edge detect vector interrupt input (for detecting both rising and
falling edges).
Edge detect vector interrupt input (detected edge selectable).
Edge detect testable input (for rising edge detection).
Clock output.
Crystal/ceramic connect pin (system clock oscillation).
In case with the external clock, input a signal to X1 and the
antiphase to X2.
System reset input (low level active).
No Connection
Positive power supply.
GND potential.
Function
DD
directly.
At Reset
Input
Input
Input
Input
Input
Input
Input
Input
Type*1
Circuit
I/O
N
B
E
E
B
B
B
B
E
B
F

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