HEF4017BT,653 NXP Semiconductors, HEF4017BT,653 Datasheet - Page 10

• Manufacturer Part Number: HEF4017BT,653
• Description: IC COUNTER 5STAGE JOHNSON 16SOIC
• Manufacturer: NXP Semiconductors
• Series: 4000Br
• Type: Decader

Specifications of HEF4017BT,653

• Package / Case: 16-SOIC (3.9mm Width)
• Logic Type: Counter, Decade
• Direction: Up
• Number Of Elements: 1
• Number Of Bits Per Element: 10
• Reset: Asynchronous
• Count Rate: 30MHz
• Trigger Type: Positive, Negative
• Voltage - Supply: 4.5 V ~ 15.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Counter Type: Decade Counters
• Logic Family: HEF4017B
• Number Of Bits: 10
• Operating Supply Voltage: 3 V to 15 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Technology: CMOS
• Number Of Elements: 1
• Logical Function: Counter/Divider
• Operating Supply Voltage (typ): 3.3/5/9/12V
• Output Type: Standard
• Package Type: SO
• Propagation Delay Time: 290ns
• Operating Temp Range: -40C to 125C
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 15V
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Timing: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 933372700653; HEF4017BTD-T; HEF4017BTD-T

NXP Semiconductors
Table 9.
HEF4017B_6
Product data sheet
Supply voltage
V
5 V to 15 V
Fig 8.
Fig 9.
DD
Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition, t
CP1 triggers on a HIGH-to-LOW transition.
The shaded areas indicate where the output state is set by the input count.
Measurement points given in
Waveforms showing the minimum pulse width for CP0, CP1 and MR input; the maximum frequency for
CP0 and CP1 input; the recovery time for MR and the MR input to Qn and Q5-9 output propagation delays
Hold times are shown as positive values, but may be specified as negative values;
Measurement points given in
Waveforms showing hold times for CP0 to CP1 and CP1 to CP0
Measurement points
CP0 input
CP1 input
CP0 input
CP1 input
MR input
Q1 - Q9
output
Q0, Q5 - Q9
output
V
V
SS
SS
V
V
I
I
Table
Table
V
V
V
V
V
V
V
OH
OH
SS
SS
SS
OL
OL
V
V
V
I
I
I
9.
9.
Input
V
0.5V
M
DD
Rev. 06 — 5 November 2009
V
M
V
V
t
h
V
M
M
M
1/f
max
V
t
t
PHL
PLH
M
1/f
t
W
max
V
V
M
M
t
t
W
W
t
rec
W
and t
V
M
t
h
V
0.5V
rec
Output
M
5-stage Johnson decade counter
are measured when CP0 = HIGH and
001aaj306
V
M
DD
001aae578
HEF4017B
© NXP B.V. 2009. All rights reserved.
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