CS98000-CQ Cirrus Logic, Inc., CS98000-CQ Datasheet - Page 13
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CS98000-CQ
Manufacturer Part Number
CS98000-CQ
Description
Internet DVD (iDVD) Chip Solution
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS98000-CQ.pdf
(40 pages)
Sharing the same interface, CS98000 also supports
flash ROM, OTP, or mask ROM interface. Code is
stored in ROM. After system is booted, the code is
shadowed inside DRAM for execution. The flash
ROM interface is provided so that the code can be
upgraded in the field once the communications
channel is established (modem port, CD-R, serial
port. Utility software will be provided to debug and
upgrade code for the system manufacturer.
3.6
The DMA controller moves data between the exter-
nal memory and an internal memory. The external
memory address can be specified using a register,
or in FIFO mode, using start and end address regis-
ters. Separate start/end address registers are used
for DMA read and write operations. The DMA in-
terface also has a block transfer function, which al-
lows for the transfer of one block of data from one
external memory location to another external mem-
ory location. In effect, combining a DMA read and
write into one operation. In addition, the DMA
write operation allows for byte, short, word, and
other types of masking.
3.7
The system control functions are used to coordinate
the activities of the multiple processors, and to pro-
vide the supporting system operations. Four 32-bit
communication registers are available inter-pro-
cessor communication, and eight semaphore regis-
ters are used for resource locking. Timers are
available for general-purpose functions, as well as
more specialized functions such as watchdog tim-
ers and performance monitoring. The large number
of general purpose I/Os offers flexibility in system
configurations. An I2C master allows for control of
other I2C devices, such as a video encoder. An I2C
slave port shares the same pins, and can be used for
debug functions. Interrupts can be generated on
specific or generic events. Infrared inputs can be
filtered of glitches or stored unfiltered into memo-
ry. Control of all the internal clocks is also possi-
DS525PP1
Dataflow Control (DMA)
System Control Functions
ble. Internal PLLs are used to generate the internal
system and memory clocks, and audio clocks of
any widely used frequency.
3.8
The CS98000 has a programmable interface port
which can be configured to connect to industry
standard CD/DVD loaders without external glue
logic. The CD/DVD interface fully supports popu-
lar CD/DVD loaders such as Sanyo, Sony and
AVS. The interface consists of DVD control and
data ports, and an optional CD control/data port.
The CS98000 hardware manages the DVD inter-
face and moving data to an arbitrary size input
FIFO in DRAM.
The same interface pins can be optionally config-
ured as a generic 16-bit host master port. In this
mode, the CS98000 can control up to four devices
(using 4 chip select outputs), each of which may
use different protocol and timing. The interface can
be set up in ATAPI mode, to connect directly to any
ATAPI DVD loader (using two chip selects). Si-
multaneously, the other two chip selects can be
configured to connect to other devices, such as a
super I/O chip or hard disk.
A third option is to configure the interface for mi-
cro-less DVD loader operation, which may also be
configured to connect without external glue logic.
3.9
Compressed MPEG data is read from the DVD disk
into an input FIFO in DRAM. The data flow
(DMA) controller moves Video packets from the
input FIFO into the MPEG decoder’s input FIFO
(also in DRAM). The DMA controller can also per-
form advanced functions such as start code search,
relieving the RISC processors. The System Sync
function is used to control the timing of MPEG pic-
ture decoding. The MPEG Video decoder process-
es I, B and P frames, and writes to video frame
buffers in DRAM for output to the display. Special
DVD/ATAPI Interface
MPEG Video Decoding
CS98000
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