TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 26

• Manufacturer Part Number: TDF8599
• Description: I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
TDF8599_1
Product data sheet
9.2 Data bytes
If R/W = 1, the TDF8599 sends two data bytes to the microprocessor (DB1 and DB2). All
short diagnostic and offset protection bits are latched. In addition, all bits are reset after a
read operation except the DC load detection bits (DBx[D4], DB1[D6]). The default setting
for all bits is logic 0.
In Parallel mode, the diagnostic information is stored in byte DB1.
Table 16.
Data byte DB1[D7] indicates whether the instruction bits have been set to logic 0. In
principle, DB1[D7] is set after a POR or when all the instruction bits are programmed to
logic 0. Pin DIAG is activated when bit IB1[D7] = 1.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Value DB1 channel 1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description of data bytes
at least 1 instruction bit set to logic 1
all instruction bits are set to logic 0
invalid DC load data
valid DC load data
no overvoltage
overvoltage protection active
speaker load channel 1
open load channel 1
no shorted load
shorted load channel 1
no offset
offset detected
no short to V
short to V
no short to ground channel 1
short to ground channel 1
Rev. 01 — 13 November 2008
p
channel 1
p
channel 1
Class-D power amplifier with load diagnostics
DB2 channel 2
below maximum temperature
maximum temperature protection
activated
no temperature warning
temperature pre-warning active
no undervoltage
undervoltage protection active
speaker load channel 2
open load channel
no shorted load
shorted load channel 2
reserved
reserved
no short to V
short to V
no short to ground channel 2
short to ground channel 2
p
channel 2
p
channel 2
TDF8599
© NXP B.V. 2008. All rights reserved.
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