TDF8599 NXP Semiconductors, TDF8599 Datasheet - Page 8

• Manufacturer Part Number: TDF8599
• Description: I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier
• Manufacturer: NXP Semiconductors

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NXP Semiconductors
TDF8599_1
Product data sheet
8.3.1 Master and slave mode selection
8.3 Pulse-width modulation frequency
Table 4.
[1]
Table 5.
The output signal from the amplifier is a PWM signal with a switching frequency of f
This frequency is set by connecting a resistor (R
The optimal clock frequency setting is between 300 kHz and 400 kHz. Connecting a
resistor with a value of 39 k , for example, sets the clock frequency to 320 kHz. The
external capacitor (C
reduce jitter and sensitivity to disturbance. Using a 2
application generates an analog audio signal across the loudspeaker.
In a master and slave configuration, multiple TDF8599 devices are daisy-chained together
in one audio application with a single device providing the clock frequency signal for the
other devices. In this situation, it is recommended that the oscillators of all devices are
synchronized for optimum EMI behavior as follows:
All OSCIO pins are connected together and one TDF8599 in the application is configured
as the clock-master. All other TDF8599 devices are configured as clock-slaves (see
Figure
Table 6.
Pin EN
S2 closed
S2 open
Pin EN
S2 closed
S2 open
Mode
Master
Slave
•
•
X = do not care
The clock-master pin OSCIO is configured as the oscillator output. When a resistor
(R
mode.
The clock-slave pins OSCIO are configured as the oscillator inputs. When pin
OSCSET is directly connected to pin AGND (see
mode.
osc
6).
) is connected between pins OSCSET and AGND, the TDF8599 is in Master
I
Non-I
Mode setting OSCIO
2
C-bus mode operation
2
C-bus mode operation
osc
Rev. 01 — 13 November 2008
Bit IB1[D0]
1
1
0
X
Bit IB2[D0]
S1 open
S2 closed
do not care
) has no influence on the oscillator frequency. It does however,
[1]
Settings
Pin OSCSET
R
R
osc
osc
> 26 k
= 0 k ; shorted to AGND
Class-D power amplifier with load diagnostics
Bit IB2[D0]
0
1
X
X
[1]
[1]
osc
) between pins OSCSET and AGND.
nd
Table
order LC demodulation filter in the
6), the TDF8599 is in Slave
Pin OSCIO
output
input
Mode
Operating mode
Mute mode
Standby mode
off
Mode
Operating mode
Mute mode
off
TDF8599
© NXP B.V. 2008. All rights reserved.
osc
8 of 52
.