MAS3587F Micronas, MAS3587F Datasheet - Page 43
MAS3587F
Manufacturer Part Number
MAS3587F
Description
MPEG Layer 3 Audio Encoder/Decoder
Manufacturer
Micronas
Datasheet
1.MAS3587F.pdf
(83 pages)
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ADVANCE INFORMATION
3.4.3. Codec Registers
Table 3–12: Codec control registers on I
Micronas
Register
Address
(hex)
CONVERTER CONFIGURATION
00 00
INPUT MODE SELECT
00 08
Function
Audio Codec Configuration
0 dB is related to the D/A full-scale output voltage
(Please refer to Section 4.6.4. on page 72)
bit[15:12]
bit[11:8]
bit[7:4]
bit[3]
bit[2]
bit[1]
bit[0]
1)
also controlled with this bit. In order to avoid click noise, the reference voltage
at pin AGNDC should have reached a near ground potential before repower-
ing the D/A converter after a short down phase.
Alternatively at least one of the A/D converters (bits [2] or [1]) should remain
set during short power-down phases of the D/A. Then the DC reference volt-
age generation for the D/A converter will not be interrupted.
Input Mode Setting
bit[15]
bit[14:2]
bit[1:0]
The generation of the internal DC reference voltage for the D/A converter is
A/D converter left amplifier gain = n*1.5 3 [dB]
A/D converter right amplifier gain = n*1.5 3 [dB]
1111
1110
0011
0010
0001
0000
Microphone amplifier gain = n*1.5+21 [dB]
1111
1110
0001
0000
Input selection for left A/D converter channel
0
1
Enable left A/D converter
Enable right A/D converter
Enable D/A converter
Mono switch
0
1
Reserved, must be set to 0
Deemphasis select
0
1
2
...
...
+19.5 dB
+18.0 dB
+1.5 dB
0.0 dB
+43.5 dB
+42.0 dB
+22.5 dB
+21.0 dB
line-in
microphone
stereo input mode
left channel is copied into the right channel
deemphasis off
deemphasis 50 µs
deemphasis 75 µs
2
C subaddress 6C
1.5 dB
3.0 dB
...
...
1)
1)
1)
hex
MAS 3587F
Name
CONV_CONF
ADC_IN_MODE
43
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