MAS3587F Micronas, MAS3587F Datasheet - Page 7
![no-image](/images/manufacturer_photos/0/4/442/micronas_sml.jpg)
MAS3587F
Manufacturer Part Number
MAS3587F
Description
MPEG Layer 3 Audio Encoder/Decoder
Manufacturer
Micronas
Datasheet
1.MAS3587F.pdf
(83 pages)
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ADVANCE INFORMATION
2. Functional Description of the MAS 3587F
2.1. Overview
The MAS 3587F is intended for use in consumer audio
applications. It encodes analog audio input, PCM data
or S/PDIF signals to variable bit rate MPEG 1/2 Layer
3 data streams. The compressed data is stored in an
external memory via the parallel port. For playback it
receives S/PDIF, parallel or serial data streams and
decodes MPEG Layer 2 and 3 (including the low sam-
pling frequency extensions).
2.2. Architecture of the MAS 3587F
The hardware of the MAS 3587F consists of a high-
performance RISC Digital Signal Processor (DSP),
and appropriate interfaces. A hardware overview of the
IC is shown in Fig. 2–1.
Mic. Input
(incl. Bias)
Line Input
S/PDIF Input 1
S/PDIF Input 2
Serial Audio
(I
Serial Audio
(stream, SDIB)
Xtal
18.432 MHz
Fig. 2–1: The MAS 3587F architecture
Micronas
2
S, SDI)
V
V1
V2
BAT
1
2
Mon.
Osc.
Volt.
A/D
Div.
Synth.
PLL
Accumulators
ALU
D0
Registers
2
ROM
Div.
MAC
Synthesizer
D1
2.3. DSP Core
The internal processor is a dedicated DSP for
advanced audio applications.
2.4. RAM and Registers
The DSP core has access to two RAM banks denoted
D0 and D1. All RAM addresses can be accessed in a
20-bit or a 16-bit mode via I
internal DSP states the processor core has an address
space of 256 data registers which can be accessed by
I
on page 24.
2
Clock
C bus. For more details please refer to Section 3.3.
MIX
Scaler
Control
Codec
DCCF
DCFR
DSP
Audio
Proc.
2
2
C bus. For fast access of
Interface
I
D/A
2
MAS 3587F
C
2
Serial
Audio
(I
Parallel
I/O Bus
(PIO)
2
S/PDIF
Output
Audio
Output
S, SDO)
I
control
2
CLKO
C
7
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