IDT7282L20PA8 IDT, Integrated Device Technology Inc, IDT7282L20PA8 Datasheet - Page 7

• Manufacturer Part Number: IDT7282L20PA8
• Description: IC FIFO 1KX9 20NS 56TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT7282L20PA8

• Function: Asynchronous
• Memory Size: 9K (1K x 9)
• Access Time: 20ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-TSSOP
• Configuration: Dual
• Density: 9Kb
• Access Time (max): 20ns
• Word Size: 9b
• Organization: 1Kx9
• Sync/async: Asynchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: TSSOP
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 125mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 7282L20PA8

OPERATING MODES:
each system (i.e. FF is monitored on the device where W is used; EF is monitored
on the device where R is used).
SINGLE DEVICE MODE
application requirements are for 256/512/1,024/2,048/4,096/8,192 words or
less. These FIFOs are in a Single Device Configuration when the Expansion
In (XI) control input is grounded (see Figure 12).
DEPTH EXPANSION
ments are for greater than 256/512/1,024/2,048/4,096/8,192 words. Figure
HF
XO
IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO
DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
R
W
XI
W
W
R
R
Care must be taken to assure that the appropriate flag is monitored by
A single IDT7280/7281/7282/7283/7284/7285 may be used when the
These devices can easily be adapted to applications when the require-
t
HALF-FULL OR LESS
LAST PHYSICAL
XIS
LOCATION
WRITE TO
t
XOL
t
XI
FIRST PHYSICAL
LOCATION
WRITE TO
t
WHF
t
XOH
Figure 9. Half-Full Flag Timing
Figure 10. Expansion Out
t
XIR
Figure 11. Expansion In
MORE THAN HALF-FULL
7
14 demonstrates a four-FIFO Depth Expansion using two IDT7280/7281/
7282/7283/7284/7285s. Any depth can be attained by adding additional
IDT7280/7281/7282/7283/7284/7285s. These FIFOs operate in the Depth
Expansion mode when the following conditions are met:
1. The first FIFO must be designated by grounding the First Load (FL) control
2. All other FIFOs must have FL in the HIGH state.
3. The Expansion Out (XO) pin of each device must be tied to the Expansion
4. External logic is needed to generate a composite Full Flag (FF) and Empty
5. The Retransmit (RT) function and Half-Full Flag (HF) are not available in
input.
In (XI) pin of the next device. See Figure 14.
Flag (EF). This requires the ORing of all EFs and ORing of all FFs (i.e. all
must be set to generate the correct composite FF or EF). See Figure 14.
the Depth Expansion Mode.
t
LAST PHYSICAL
XIS
READ FROM
LOCATION
t
XOL
FIRST PHYSICAL
READ FROM
LOCATION
t
RHF
COMMERCIAL TEMPERATURE RANGE
t
XOH
HALF-FULL OR LESS
JANUARY 13, 2009
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3208 drw 12
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