IMP16C552-CJ68 IMP Inc, IMP16C552-CJ68 Datasheet - Page 8

• Manufacturer Part Number: IMP16C552-CJ68
• Description: Dual Universal Asynchronous Receiver/Transmitter (UART) with 16-BYTE FIFO & Parallel Printer Port
• Manufacturer: IMP Inc

8
Operational Description
MASTER RESET
A low level input on RESET* pin reset both serial channels and parallel port and forces internal
register and output pins as shown in Table 1.
TABLE1-Reset Configuration of Registers and Output signal for serial channel
Interrupt Enable register
Interrupt Identification
Register
Line Control Register
Mode Control Register
Line Status Register
Mode Status Register
SOUT
INTRPT(RCVR ERRS)
INTRPT(RCVR DATA READY)
INTRPT(THRE)
RTS*
DTR*
RCVR FIFO
Register/signal
Reset control
Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
Master Reset
MODEM Signal Inputs
Master Reset
Master Reset/Read LSR
Master Reset /Read RBR
Master Reset /Read II/write
THR
Master Reset
Master Reset
Master Reset
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IMP16C552
IMP16C552
Reset state
All bits low-bits(4-7)are
Permanently low
Bit 0is forced high and
bits(1-3),6,7are
low-bits
permanently Low
All bits low
All bits low-bits (5-7) are
permanently Low
All
5.6which are high
Bits(0-3) low
Bits(4-7)follow input signals
High
Low
Low
Low
High
High
Undefined data
bits
low-except
4and
Forced
5are
nits
© 2002 IMP, Inc.