AN1250 STMicroelectronics, AN1250 Datasheet
AN1250
Related parts for AN1250
AN1250 Summary of contents
Page 1
... Sampling Rates (KHz) 32 – 44.1 – 48 Free, 32, 40, 48, 56, 64, 80, 96, 112, 128, 160, 16 – 22.05 – 24 Free, 8, 16, 24, 32, 40, 48, 56, 64, 80, 96, 112, 8 – 11.025 - 12 Free, 8, 16, 24, 32, 40, 48, 56, 64 AN1250 ADPCM CODEC by Marco Veneri AUDIO AMPLIFIER D00AU1190 Bitrates (kbit/s) 192, 224, 256, 320 ...
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... AN1250 APPLICATION NOTE can be selected for the compressed output data stream in order to reduce sensitiveness to bitstream errors while decoding and to enable fast-forward/backward capabilities. Embedded in the device a digital volume at- tenuator and a dual-band equalizer are available, eliminating the hassle and additional cost of an external audio processor. The device is fully operated using the standard I2C bus: interface configuration, PLL setup, operation mode and volume / tones settings can be easily programmed writing to some specific register. It’ ...
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... Mode 0 flow chart show the flow diagram that must be used in order to send uncompressed samples and re- trieve encoded data. SDI SCKR DATA_REQ STA015 BIT_EN SO28 TQFP44 LFBGA64 D99AU1121A Name SOFT_RESET ADPCM_SAMPLE_FREQ CHIP_MODE PLAY RUN AN1250 APPLICATION NOTE LRCKT SCKT DAC SDO OCLK Value (encoder mode) 3 (decoder mode) 0 (encoder mode) 1 (decoder mode) 1 3/21 ...
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... AN1250 APPLICATION NOTE Figure 3. Mode 0 flow chart 3.2 Mode 1 (from ADC to GPSO) Figure 4. Mode 1 block diagram GPSO_DATA GPSO_REQ MCU GPSO_SCKR SDI (for decoding) When the device is configured in mode 1 the ADC interface is selected for incoming data and the GPSO inter- face for encoded output data. The GPSO_REQ signal should be connected to an interrupt source of the micro- controller ...
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... ADC_ENABLE ADC_WLEN ADPCM_SAMPLE_FREQ ADPCM_CONFIG CHIP_MODE PALY RUN IRQ STA015 SDI (for decoding) SO28 TQFP44 LFBGA64 LRCK_ADC SCK_ADC ADC AN1250 APPLICATION NOTE Value (encoder mode) 3 (decoder mode) 0 (encoder mode) 1 (decoder mode) 1 LRCKT SCKT DAC SDO OCLK SDI_ADC D00AU1185 ...
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... AN1250 APPLICATION NOTE The interrupt pulse length may be programmed up to 128 DSP clock cycles using the ADPCM_INT_CFG (0xBE) register. The polarity of the interrupt signal can be programmed as well. For IRQ pin assignment refer to Figure 5. Table 4. Mode 2 (G721, 16kHz, 8 bit mono) configuration Address ...
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... Sample frequency 11 ADPCM configuration Name SOFT_RESET GPSO_ENABLE ADPCM_SAMPLE_FREQ ADPCM_CONFIG CHIP_MODE PALY RUN Frame size = (AFS * 90) + 108 Description Sync word Frame size Sample size AN1250 APPLICATION NOTE Value (encoder mode) 3 (decoder mode) 0 (encoder mode) 1 (decoder mode) 1 Content 0x5354445649 ADPCM_FRAME_SIZE ADC_WLEN ADPCM_SAMPLE_FREQ ...
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... AN1250 APPLICATION NOTE Table 7. Bitrate overhead Header Value Size 20 108 bytes 40 108 bytes 5. ANCILLARY DATA Ancillary data are optional user data that can be included into MP3 frames. STA014/STA015 contains 56 con- secutive 8-bit registers corresponding to the maximum number of ancillary data that can be contained in an MPEG frame: those registers may be read via I2C bus in order to retrieve this auxiliary information ...
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... The board is delivered with both voltage regulators mounted: as described in LPT interface layout “Configura- tions” note this mode requires a single 7V power supply. Figure 8. LPT interface layout AN1250 APPLICATION NOTE 9/21 ...
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... AN1250 APPLICATION NOTE Figure 9. LPT interface schematic VIN GND 47 F 100nF GND 10V 2 N.C. R2 10K 6.2 STA014/STA015 Evaluation board The STA014/STA015 evaluation board layout is shown in Figure 10. If the board is operated without the ST pro- vided LPT interface a single 3V power supply must be used (J1 connector): DL1 led will indicate supply pres- ence ...
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... Entering from an external source it could be useful to short the R12 and R23 resistors in order to obtain unity gain, provided the external signal is already preamplified. Please note that signal saturation at the input stage of the device could produce a very noisy signal when en- coding in DVI ADPCM algorithm and could prevent any successful encoding if G72x algorithms are used. AN1250 APPLICATION NOTE 11/21 ...
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... AN1250 APPLICATION NOTE Figure 11. STA014/STA015 evaluation board schematic GND 20 GND 19 TP1 18 V DOUT SDI_ADC G_DATA 16 G_REQ GPSO_DATA 15 DATA_R OUT_CLK/DATA_REC LRCIN LRCK_ADC 10K 10 C10 4 C13 9 100nF 8 GPIO/STROBE 7 RESET RESET 6 G_SCKR GPSO_SCKR 5 SDI 4 SCKR 3 SDA 2 SCL ...
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... The left/right volume sliders can be linked together checking the 'Left/Right Lock' box. The dual band equalizer can be adjusted both in frequency and enhancement. Special care must be taken before enhancing bass/treble: infact, in order to avoid any distortion, the 'Tone Attenuation' slider must be previously set to the maximum value of bass/treble desired enhancement. AN1250 APPLICATION NOTE 13/21 ...
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... AN1250 APPLICATION NOTE § Using this 3 position slider it's possible to change the priority of the MP3 bitstream transmitting thread. Higher priority will avoid audio gaps when switching to other applications but, of course, will slow down the machine. § Some default control presets are already stored in those 6 memories. To store current controls posi- tion just press down one of those buttons until it's automatically released. § ...
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... Expansion files can be downloaded using this section: each file is downloaded using the I2C link and different reserved registers. § This section just duplicate the previous one and offers handy controls when using expansion kits which include more than one file. AN1250 APPLICATION NOTE 15/21 ...
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... AN1250 APPLICATION NOTE 8.4 PCM page Figure 15. PCM page § 1: Using the PCM page it's possible to change the serial output interface of the decoder in order to fit different D/A converter protocols. This page has been added just to show the various configuration options but, of course, there's no need to use it with the ST provided STA014/STA015 evaluation kit. ...
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... MP3 file or while running the ADPCM engine. § order to check the I2C connection and, basically, the correct setup of the evaluation kit a 'Test' button has been included in this page. It just reads some device registers and compare the result with the expected one. AN1250 APPLICATION NOTE 17/21 ...
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... AN1250 APPLICATION NOTE 8.6 Codec page Figure 17. Codec page § The 'Audio Control' section offers a duplicate set of the audio controls available on the main page. The only difference is that the 'Tone Attenuation' register is automatically set to the maximum value of the desired tones enhancement. Of course this controls can be used when decoding an MP3 file as well: infact they just rely on the same set of I2C registers. § ...
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... Figure 19 no technical skills are required to operate the software. Only two input data are required to compute PLL register values: XTI Frequency: this is the external reference frequency (tipically coming from a crystal device). A wide range of values can be used with no loss in decoder performance (suggested values are between 8 MHz and 24 MHz) AN1250 APPLICATION NOTE 19/21 ...
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... AN1250 APPLICATION NOTE DAC Oversampling Ratio: this value depends on the choosed D/A converter. Typical values are 128, 256 or 384. Figure 19. Config PLL utility 10 POWER CONSUMPTION HINTS In order to reduce the device power consumption here are some general guidelines the device reference frequency comes from an external oscillator then the XTO pad can be disabled: in order to do this bit XTODIS of register PLLCTL must be set to 1 ...
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... STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain 2000 STMicroelectronics - All Rights Reserved STMicroelectronics GROUP OF COMPANIES - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com AN1250 APPLICATION NOTE 21/21 ...