AN1250 STMicroelectronics, AN1250 Datasheet - Page 3

• Manufacturer Part Number: AN1250
• Description: STA014/STA015 MPEG LAYER III DECODER AND ADPCM CODEC
• Manufacturer: STMicroelectronics

3.1 Mode 0 (from SDI to I2C)
Figure 2. Mode 0 block diagram
When STA014/STA015 is configured in mode 0 (default mode) it is pin to pin compatible with its predecessor
STA013. The SDI input interface must be selected and encoded ADPCM data must be retrieved through a set
of dedicated I2C registers using a polling technique based on the ADPCM_DATA_READY register. Both DVI
and G726 pack algorithms are supported but the frame mode can be activated only for DVI: in order to be com-
patible with STA013 the encoder should be configured for 8 kHz, 16 bit mono input signal, as shown in Table 2.
Table 2. Mode 0 (8kHz, 16 bit mono) configuration
Mode 0 flow chart show the flow diagram that must be used in order to send uncompressed samples and re-
trieve encoded data.
Address
114
16
83
77
19
MCU
ADPCM_SAMPLE_FREQ
DATA_REQ
BIT_EN
SCKR
SDI
I
2
C
SOFT_RESET
CHIP_MODE
Name
PLAY
RUN
STA015
LFBGA64
TQFP44
SO28
D99AU1121A
LRCKT
SCKT
OCLK
SDO
AN1250 APPLICATION NOTE
DAC
2 (encoder mode)
3 (decoder mode)
0 (encoder mode)
1 (decoder mode)
Value
1
2
1
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