UPD77018A NEC, UPD77018A Datasheet - Page 22

• Manufacturer Part Number: UPD77018A
• Description: 16 bits/ Fixed-point Digital Signal Processor
• Manufacturer: NEC

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2.4.3 Data Memory Addressing
2.5 On-chip Peripheral Circuit
They are mapped in both X and Y memory areas, and are accessed as memory mapped I/O by the PD77018A
CPU.
2.5.1 Serial Interface Outline
length can be programmed independently to be 8 bits or 16 bits. MSB first or LSB first can also be selected.
Data is input/output by hand shaking for an external device, and by interrupts, polling or wait function in internal.
2.5.2 Host Interface Outline
controller. When an external device accesses host interface, HA0 and HA1 pins; which are host address input
pins; specifies bit 15 to bit 8 and bit 7 to bit 0. The PD77018A includes 3 registers consisting of 16 bits, which
are dedicated for input data, output data and status. The PD77018A has three types of interface method for
internal and external data; interrupts, polling and wait function.
2.5.3 General Input/output Ports Outline
includes two registers. One is 4 bits register for input/output data, and the other is 16 bits for control.
2.5.4 Wait Cycle Register
accessed. When external data memory area (C000H - FFFFH) is accessed, 0, 1, 3, or 7 wait cycle can be set.
There are following two types of data memory addressing.
• Direct addressing
• Indirect addressing
The PD77018A includes serial interface, host interface, general input/output ports and wait cycle registers.
The PD77018A has 2 channel serial interfaces. Serial I/O clock must be provided from external. Frame
The PD77018A has 8 bits parallel ports as host interface to input/output data to and from host CPU and DMA
General input/output ports consist of 4 bits. User can set each port as input or output. The PD77018A
The wait cycle registers consist of 16 bits. It is used to set wait cycle number when external memory is
When external data memory area is accessed, wait cycle can be also set by WAIT pin.
The address is specified in the instruction field.
The address is specified by the data pointer (DP). DP can get a bit reverse before addressing. It can
update the DP value after accessing data memory.
PD77018A, 77019