UPD78323 NEC, UPD78323 Datasheet - Page 58
![no-image](/images/manufacturer_photos/0/4/470/nec_sml.jpg)
UPD78323
Manufacturer Part Number
UPD78323
Description
16/8-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheet
1.UPD78323.pdf
(86 pages)
- Current page: 58 of 86
- Download datasheet (455Kb)
58
Note n indicates the number of registers described as post.
CALL
CALLF
CALLT
CALL
BRK
RET
RETB
RETI
PUSH
PUSHU
POP
POPU
MOVW
INCW
DECW
CHKL
CHKLA
Mnemonic
!addr16
!addr11
[addr5]
rp1
[rp1]
sfrp
post
PSW
post
sfrp
post
PSW
post
SP, #word
SP, AX
AX, SP
SP
SP
sfr
sfr
Operand
3
2
1
2
2
1
1
1
1
3
2
1
2
3
2
1
2
4
2
2
2
2
3
3
(SP–1)
PC
(SP–1)
PC
(SP–1)
PC
PC
(SP–1)
PC
(SP–1)
PC
(SP–1)
(SP–3)
PC
IE
PC
PC
PSW
SP
PC
PSW
SP
(SP–1)
(SP–2)
SP
{(SP–1) post
(SP–1) PSW
{(UP–1) post
sfr
sfr
SP
{post
PSW
{post
SP
SP
AX
SP
SP
(pin level)
buffer)
A
buffer)
n times
n times
n times
n times
L
H
L
15–11
H
L
H
H
L
L
L
L
L
L
L
L
(pin level)
0
word
AX
SP
(TPF, 00000000, addr5), SP SP–2
(TPF, 00000000, addr5+1),
SP+4
SP+4
SP–2
SP+2
addr16, SP
SP+1
SP–1
(003EH), PC
(SP)
(SP+1)
(SP), PC
(SP), PC
(SP), PC
rp1
(rp1+1), PC
(SP), PSW
(SP), post
(UP), post
00001, PC
Note
Note
Note
Note
(SP+2), PSW
(SP+2), PSW
sfr
(PC+3)
(PC+2)
(PC+1)
(PC+2)
H
(PC+2)
PSW
(PC+1)
sfr
, PC
(signal level before output
L
H
H
H
H
, (SP–2)
, (SP–2) PSW
, (UP–2) post
H
L
H
H
H
, (SP–2)
Operation
(signal level before output
H
H
H
H
H
H
, (SP–2)
, (SP–2)
, (SP–2)
, (SP–2)
, (SP–2)
, (SP–4)
H
H
H
H
L
10–0
rp1
(SP+1), SP
(SP+1)
(SP+1)
SP–2
(SP+1), SP SP+2
(003FH), SP
(rp1), SP
H
H
L
(SP+1), SP SP+2}
(UP+1), UP UP+2}
, SP
addr11,SP SP–2
post
(SP+3)
(SP+3)
PSW
L
(PC+3)
(PC+2)
(PC+1)
(PC+2)
(PC+2)
(PC+1)
L
, UP UP–2}
L
, SP SP–2
SP–2
,SP SP–2}
L
SP+2
SP–2
SP–4
L
L
L
L
L
L
,
,
,
,
,
,
S
R
R
R
PD78323, 78324
Z
R
R
R
Flags
AC P/V CY
R
R
R
R
R
R
P
P
R
R
R
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