UPD78F9418A NEC, UPD78F9418A Datasheet - Page 137

• Manufacturer Part Number: UPD78F9418A
• Description: (UPD7894xxA) 8-Bit Single Chip Microcontrollers
• Manufacturer: NEC

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Symbol
WDTM
(2)
Notes 1. Once RUN has been set to (1), it cannot be cleared to (0) by software. Therefore, when counting is
Cautions 1. When the watchdog timer is cleared by setting RUN to 1, the actual overflow time is up to
Watchdog timer mode register (WDTM)
This register sets the operation mode of the watchdog timer, and enables/disables counting of the watchdog
timer.
WDTM is set using a 1-bit or 8-bit memory manipulation instruction.
RESET input sets WDTM to 00H.
2. Once WDTM3 and WDTM4 have been set to (1), they cannot be cleared to (0) by software.
3. The watchdog timer starts operation as an interval timer when RUN is set to 1.
WDTM4
RUN
RUN
<7>
0
1
0
0
1
1
started, it cannot be stopped by any means other than RESET input.
2. In watchdog timer mode 1 or 2, set WDTM4 to 1 after confirming that TMIF4 (bit 0 of interrupt
WDTM3
0.8% shorter than the time set by timer clock selection register 2 (TCL2).
request flag register 0 (IF0)) is set to 0. While TMIF4 is 1, a non-maskable interrupt is
generated upon write completion if watchdog timer mode 1 or 2 is selected.
Stop counting
Clear counter and start counting
6
0
0
1
0
1
Operation stopped
Interval timer mode (overflow and maskable interrupt occur)
Watchdog timer mode 1 (overflow and non-maskable interrupt occur)
Watchdog timer mode 2 (overflow occurs and reset operation started)
0
5
Figure 9-3. Format of Watchdog Timer Mode Register
WDTM4 WDTM3
4
3
CHAPTER 9 WATCHDOG TIMER
2
0
User’s Manual U13952EJ3V0UD
Selection of operation of watchdog timer
Selection of operation mode of watchdog timer
1
0
0
0
Address
FFF9H
Note 3
After reset
00H
Note 1
Note 2
R/W
R/W
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