IDT72413L45SO IDT, Integrated Device Technology Inc, IDT72413L45SO Datasheet - Page 6

• Manufacturer Part Number: IDT72413L45SO
• Description: IC FIFO PAR W/FLAGS 32KB 20SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 7200r

Specifications of IDT72413L45SO

• Function: Asynchronous
• Memory Size: 32K
• Access Time: 45ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Configuration: Dual
• Density: 320b
• Access Time (max): 22(Min)ns
• Word Size: 5b
• Organization: 64x5
• Sync/async: Asynchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: SOIC
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Supply Current: 60mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Rate: -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 72413L45SO

NOTES:
1. FIFO is initially full.
2. SO pulse is applied.
3. SI is held HIGH.
4. As soon as IR becomes HIGH the Input Data is loaded into the FIFO.
5. The write pointer is incremented. SI should not go LOW until (t
NOTES:
1. This data is loaded consecutively A, B, C.
2. Output data changes on the falling edge of SO after a valid SO sequence, i.e., OR and SO are both HIGH together.
NOTES:
1. OR HIGH indicates that data is available and a SO pulse may be applied.
2. SO goes HIGH causing the next step.
3. OR goes LOW.
4. Read pointer is incremented.
5. OR goes HIGH indicating that new data (B) will be available at the FIFO outputs after t
6. If the FIFO has only one word loaded (A DATA) , OR stays LOW and the A-DATA remains unchanged at the outputs.
7. SO pulses applied when OR is LOW will be ignored.
IDT72413 CMOS PARALLEL FIFO WITH FLAGS
64 x 5
OUTPUT DATA
OUTPUT DATA
INPUT DATA
SO
OR
IR
SI
SO
OR
SO
(7)
(1)
(1)
(1)
(2)
Figure 4. Data is Shifted In Whenever Shift In and Input Ready are Both HIGH
t
(2)
SOH
A-DATA
Figure 6. The Mechanism of Shifting Data Out of the FIFO
(3)
1/f
OUT
t
A- DATA
ODH
PT
t
+ tI
ODS
t
SOL
PH
Figure 5. Output TIming
(3)
t
).
ORD
t
PT
6
ORD
ns.
t
OR
COMMERCIAL TEMPERATURE RANGE