IDT72221L25JI IDT, Integrated Device Technology Inc, IDT72221L25JI Datasheet - Page 10
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IDT72221L25JI
Manufacturer Part Number
IDT72221L25JI
Description
IC FIFO SYNC 1KX9 25NS 32PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet
1.IDT72211L10JG.pdf
(14 pages)
Specifications of IDT72221L25JI
Function
Synchronous
Memory Size
9K (1K x 9)
Data Rate
40MHz
Access Time
25ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Configuration
Dual
Density
9Kb
Access Time (max)
15ns
Word Size
9b
Organization
1Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
PLCC
Clock Freq (max)
40MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
35mA
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72221L25JI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72221L25JI
Manufacturer:
IDT11
Quantity:
662
Company:
Part Number:
IDT72221L25JI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT72221L25JI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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NOTE:
1. Only one of the two write enable inputs, WEN1 or WEN2, needs to go inactive to inhibit writes to the FIFO.
NOTE:
1. When t
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO™
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
(If Applicable)
(If Applicable)
When
The Latency Timings apply only at the Empty Boundary (EF = LOW).
Q
D
WCLK
t
WEN1
WEN2
REN1,
Q
RCLK
REN2
0
D
SKEW1
SKEW1
0
WCLK
WEN2
WEN1
- Q
REN1,
REN2
0
RCLK
- D
0
OE LOW
FF
- Q
- D
8
OE
8
EF
≥ minimum specification, t
< minimum specification, t
8
DATA IN OUTPUT REGISTER
8
t
DATA IN OUTPUT REGISTER
LOW
t
t
ENS
ENS
DS
t
ENS
DATA WRITE 1
t
NO WRITE
SKEW1
t
t
SKEW1
ENH
t
ENH
FRL
FRL
t
maximum = t
maximum = 2t
ENH
t
t
FRL
A
t
CLK
WFF
t
CLK
(1)
REF
+ t
+ t
SKEW1
SKEW1
t
t
ENS
ENS
t
DS
Figure 9. Empty Flag Timing
or t
Figure 8. Full Flag Timing
CLK
+ t
SKEW1
t
WFF
10
t
t
DATA READ
t
ENH
ENH
REF
t
A
t
t
ENS
ENS
t
t
ENS
DS
NO WRITE
DATA WRITE 2
t
ENH
t
A
t
t
t
ENH
SKEW1
ENH
t
DATA READ
SKEW1
COMMERCIAL AND INDUSTRIAL
t
WFF
NEXT DATA READ
t
TEMPERATURE RANGES
FFL
t
t
ENS
ENS
t
REF
(1)
(1)
(1)
OCTOBER 22, 2008
NO WRITE
2655 drw 11
2655 drw 10