IDT72231L15J IDT, Integrated Device Technology Inc, IDT72231L15J Datasheet - Page 6
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IDT72231L15J
Manufacturer Part Number
IDT72231L15J
Description
IC FIFO SYNC 512X9 15NS 32PLCC
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet
1.IDT72211L10JG.pdf
(14 pages)
Specifications of IDT72231L15J
Function
Synchronous
Memory Size
4.6K (512 x 9)
Access Time
15ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Configuration
Dual
Density
18Kb
Access Time (max)
10ns
Word Size
9b
Organization
2Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
LCC
Clock Freq (max)
66.7MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
35mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Rate
-
Lead Free Status / RoHS Status
Not Compliant, Contains lead / RoHS non-compliant
Other names
72231L15J
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT72231L15J
Manufacturer:
IDT
Quantity:
1 831
Company:
Part Number:
IDT72231L15J
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT72231L15J
Manufacturer:
IDT
Quantity:
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Part Number:
IDT72231L15J8
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IDT
Quantity:
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Company:
Part Number:
IDT72231L15J8
Manufacturer:
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Quantity:
10 000
Company:
Part Number:
IDT72231L15JI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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Write Enable 2/Load (WEN2/LD) pin is set LOW and both Read Enables (REN1,
REN2) are set LOW. Data can be read on the LOW-to-HIGH transition of the
Read Clock (RCLK).
8
8
8
8
IDT72421/72201/72211/72221/72231/72241/72251 CMOS SyncFIFO™
64 x 9, 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
The contents of the offset registers can be read on the output lines when the
IDT72231 - 2,048 x 9-BIT
7
7
Empty Offset (LSB) Reg.
Full Offset (LSB) Reg.
Default Value 007H
Default Value 007H
8
8
8
8
8
8
8
8
2
2
IDT72421 - 64 x 9-BIT
(MSB)
(MSB)
IDT72211 - 512 x 9-BIT
000
000
7
7
6
6 5
Empty Offset (LSB)
0
0
0
0
Default Value 007H
Default Value 007H
5
Full Offset (LSB)
Empty Offset (LSB) Reg.
Full Offset (LSB) Reg.
Default Value 007H
Default Value 007H
Figure 3. Offset Register Location and Default Values
1
1
(MSB)
(MSB)
0
0
8
8
8
8
0
0
0
0
0
0
0
0
IDT72241 - 4,096 x 9-BIT
7
7
Empty Offset (LSB)
Full Offset (LSB)
Default Value 007H
Default Value 007H
6
registers.
3
3
A read and write should not be performed simultaneously to the offset
(MSB)
(MSB)
0000
0000
8
8
8
8
8
8
8
8
0
0
0
0
IDT72221 - 1,024 x 9-BIT
IDT72201 - 256 x 9-BIT
7
7
7
7
Empty Offset (LSB) Reg.
Full Offset (LSB) Reg.
Empty Offset (LSB) Reg.
Full Offset (LSB) Reg.
Default Value 007H
Default Value 007H
Default Value 007H
Default Value 007H
8
8
8
8
COMMERCIAL AND INDUSTRIAL
1
IDT72251 8,192 x 9-BIT
1
(MSB)
(MSB)
00
00
7
7
TEMPERATURE RANGES
0
0
0
0
0
0
0
0
Empty Offset (LSB)
Full Offset (LSB)
Default Value 007H
Default Value 007H
4
4
OCTOBER 22, 2008
(MSB)
(MSB)
00000
00000
2655 drw 05
0
0
0
0