XC3S1200E-5FT256C Xilinx, Inc., XC3S1200E-5FT256C Datasheet - Page 149

no-image

XC3S1200E-5FT256C

Manufacturer Part Number
XC3S1200E-5FT256C
Description
XC3S1200E-5FT256C
Manufacturer
Xilinx, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S1200E-5FT256C
Manufacturer:
ALTERA
Quantity:
3 581
Part Number:
XC3S1200E-5FT256C
Manufacturer:
XILINX
0
Part Number:
XC3S1200E-5FT256C
Manufacturer:
XILINX
Quantity:
500
Miscellaneous DCM Timing
Table 110: Miscellaneous DCM Timing
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
DCM_RST_PW_MIN
DCM_RST_PW_MAX
DCM_CONFIG_LAG_TIME
This limit only applies to applications that use the DCM DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV).
The DCM DFS outputs (CLKFX, CLKFX180) are unaffected.
This specification is equivalent to the Virtex-4 DCM_RESET specfication.This specification does not apply for Spartan-3E FPGAs.
This specification is equivalent to the Virtex-4 TCONFIG specification. This specification does not apply for Spartan-3E FPGAs.
R
Symbol
(1)
(2)
(3)
Minimum duration of a RST pulse width
Maximum duration of a RST pulse width
Maximum duration from V
configuration successfully completed (DONE pin goes
High) and clocks applied to DCM DLL
www.xilinx.com
Description
CCINT
applied to FPGA
DC and Switching Characteristics
Min
N/A
N/A
N/A
N/A
3
Max
N/A
N/A
N/A
N/A
-
seconds
seconds
minutes
minutes
CLKIN
cycles
Units
149

Related parts for XC3S1200E-5FT256C