IDT72V3644L10PF IDT, Integrated Device Technology Inc, IDT72V3644L10PF Datasheet - Page 12

• Manufacturer Part Number: IDT72V3644L10PF
• Description: IC FIFO 2048X36 10NS 128QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V3644L10PF

• Function: Asynchronous, Synchronous
• Memory Size: 72K (2K x 36)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V3644L10PF

LOW. The B0-B35 lines are active outputs when CSB is LOW and W/RB is
HIGH.
transition of CLKB when CSB is LOW, W/RB is LOW, ENB is HIGH, MBB is
LOW, and FFB/IRB is HIGH. Data is read from FIFO1 to the B0-B35 outputs
by a LOW-to-HIGH transition of CLKB when CSB is LOW, W/RB is HIGH, ENB
is HIGH, MBB is LOW, and EFB/ORB is HIGH (see Table 3). FIFO reads and
writes on Port B are independent of any concurrent Port A operation.
and Write/Read selects are only for enabling write and read operations and
are not related to high-impedance control of the data outputs. If a port enable
is LOW during a clock cycle, the port’s Chip Select and Write/Read select may
change states during the setup and hold time window of the cycle.
the next word written is automatically sent to the FIFO’s output register by the
TABLE 2 — PORT A ENABLE FUNCTION TABLE
TABLE 3 — PORT B ENABLE FUNCTION TABLE
SYNCHRONIZED FIFO FLAGS
stages. This is done to improve flag-signal reliability by reducing the probability
of metastable events when CLKA and CLKB operate asynchronously to one
another. EFA/ORA, AEA, FFA/IRA, and AFA are synchronized to CLKA.
EFB/ORB, AEB, FFB/IRB, and AFB are synchronized to CLKB. Tables 4 and
5 show the relationship of each port flag to FIFO1 and FIFO2.
IDT72V3624/72V3634/72V3644 3.3V CMOS SyncBiFIFO
256 x 36 x 2, 512 x 36 x 2, 1,024 x 36 x 2
Data is loaded into FIFO2 from the B0-B35 inputs on a LOW-to-HIGH
The setup and hold time constraints to the port clocks for the port Chip Selects
When operating the FIFO in FWFT mode and the Output Ready flag is LOW,
Each FIFO is synchronized to its port clock through at least two flip-flop
CSB
CSA
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
W/RB
W/RA
H
H
H
H
X
H
H
H
L
L
L
X
L
L
L
L
ENB
ENA
H
H
H
H
H
H
H
H
X
L
L
L
X
L
L
L
MBB
MBA
H
H
H
H
H
H
X
X
L
L
L
X
X
L
L
L
CLKB
CLKA
↑
↑
↑
↑
TM
X
X
X
X
↑
↑
↑
↑
X
X
X
X
WITH BUS-MATCHING
12
LOW-to-HIGH transition of the port clock that sets the Output Ready flag HIGH.
When the Output Ready flag is HIGH, subsequent data is clocked to the output
registers only when a read is selected using the port’s Chip Select, Write/Read
select, Enable, and Mailbox select.
the Empty Flag to change state on the second LOW-to-HIGH transition of the
Read Clock. The data word will not be automatically sent to the output register.
Instead, data residing in the FIFO's memory array is clocked to the output
register only when a read is selected using the port’s Chip Select, Write/Read
select, Enable, and Mailbox select. Write and read timing diagrams for Port A
can be found in Figure 7 and 14. Relevant Port B write and read cycle timing
diagrams together with Bus-Matching and Endian select operations can be
found in Figures 8 through 13.
EMPTY/OUTPUT READY FLAGS (EFA/ORA, EFB/ORB)
(ORA, ORB) function is selected. When the Output-Ready flag is HIGH, new
data is present in the FIFO output register. When the Output Ready flag is LOW,
the previous data word is present in the FIFO output register and attempted
FIFO reads are ignored.
Data B (B0-B35) I/O
Data A (A0-A35) I/O
High-Impedance
When operating the FIFO in IDT Standard mode, the first word will cause
High-Impedance
These are dual purpose flags. In the FWFT mode, the Output Ready
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
COMMERCIAL TEMPERATURE RANGE
Mail1 read (set MBF1 HIGH)
Mail2 read (set MBF2 HIGH)
Port Function
Port Function
FIFO2 write
FIFO1 read
FIFO1 write
FIFO2 read
Mail2 write
Mail1 write
None
None
None
None
None
None
None
None