VG3617161ET-6 Powerchip, VG3617161ET-6 Datasheet - Page 15
![no-image](/images/no-image-200.jpg)
VG3617161ET-6
Manufacturer Part Number
VG3617161ET-6
Description
1,048,576 x 16 - Bit CMOS Synchronous Dynamic RAM
Manufacturer
Powerchip
Datasheet
1.VG3617161ET-6.pdf
(68 pages)
VIS
Document:1G5-0189
Starting Address
(column address A0, binary)
Starting Address
(column address A1-A0, binary)
Starting Address
(column address A2-A0, binary)
5.1 Burst Length and Sequence
words.
Full page burst is an extension of the above tables of sequential addressing, with the length being 256
(Burst Length= 2)
(Burst Length=4)
(Burst Length=8)
000
001
010
011
100
101
110
111
00
01
10
11
0
1
Sequential Addressing
Sequence (decimal)
Sequential Addressing
Sequence (decimal)
Sequential Addressing
Sequence (decimal)
0,1,2,3,4,5,6,7
1,2,3,4,5,6,7,0
2,3,4,5,6,7,0,1
3,4,5,6,7,0,1,2
4,5,6,7,0,1,2,3
5,6,7,0,1,2,3,4
6,7,0,1,2,3,4,5
7,0,1,2,3,4,5,6
0,1,2,3
1,2,3,0
2,3,0,1
3,0,1,2
0,1
1,0
Rev.2
Interleave Addressing
Sequence(decimal)
Interleave Addressing
Sequence(decimal)
Interl
eave Addressing
Sequence(decimal)
CMOS Synchronous Dynamic RAM
0,1,2,3,4,5,6,7
1,0,3,2,5,4,7,6
2,3,0,1,6,7,4,5
3,2,1,0,7,6,5,4
4,5,6,7,0,1,2,3
5,4,7,6,1,0,3,2
6,7,4,5,2,3,0,1
7,6,5,4,3,2,1,0
0,1,2,3
1,0,3,2
2,3,0,1
3,2,1,0
0,1
1,0
1,048,576 x 16 - Bit
Page 15
VG3617161ET