VG3617161ET-6 Powerchip, VG3617161ET-6 Datasheet - Page 18

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VG3617161ET-6

Manufacturer Part Number
VG3617161ET-6
Description
1,048,576 x 16 - Bit CMOS Synchronous Dynamic RAM
Manufacturer
Powerchip
Datasheet
VIS
8.AUTO PRECHARGE
Document:1G5-0189
READ with AUTO PRECHARGE
high in the READ or WRITE command (READ with AUTO PRECHARGE command or WRITE with AUTO PRE-
CHARGE command), AUTO PRECHARGE is selected and precharging begins automatically after the burst
access.
charged.
because the t
be asserted after t
into the mode register and on whether the cycle is READ or WRITE.
8.1 READ with AUTO PRECHARGE
Remark: READA means READ with AUTO PRECHARGE
During a READ or WRITE command cycle, A10 controls whether AUTO PRECHARGE is selected. If A10 is
In the WRITE cycle, t
When using AUTO PRECHARGE in the READ cycle, knowing when the PRECHARGE starts is important
The timing at which the AUTO PRECHARGE cycle begins depends both on the CAS Iatency programmed
CAS latency=2
Command
DQ
CLK
CAS latency=3
Command
DQ
clocks earlier(CAS Iatency of 3) than the last data word output.
During a READA cycle, the AUTO PRECHARGE begins one clock earlier(CAS Iatency of 2) or two
RAS
must be satisfied. Once AUTO PRECHARGE has started, an active command to the bank can
RP(min.)
DAL(min.)
has been satisfied.
T0
must be satisfied to assert the next active command to the bank being pre-
READA B
READA B
T1
T2
Rev.2
QB0
T3
QB0
QB0
QB1
Auto precharge starts
Auto precharge starts
T4
CMOS Synchronous Dynamic RAM
QB1
QB1
QB2
T5
QB2
QB3
T6
1,048,576 x 16 - Bit
QB3
Page 18
Hi-Z
T7
Burst lengh=4
VG3617161ET
Hi-Z
T8

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