LM3S1138 Luminary Micro, Inc, LM3S1138 Datasheet - Page 10
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LM3S1138
Manufacturer Part Number
LM3S1138
Description
Lm3s1138 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1138.pdf
(491 pages)
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Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 13-1.
Table 14-1.
Table 15-1.
Table 15-2.
Table 15-3.
Table 16-1.
Table 16-2.
Table 16-3.
Table 16-4.
Table 16-5.
Table 18-1.
Table 18-2.
Table 18-3.
Table 18-4.
Table 18-5.
Table 18-6.
Table 18-7.
Table 18-8.
Table 19-1.
Table 19-2.
Table 20-1.
Table 20-2.
Table 20-3.
Table 20-4.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 42
Exception Types .............................................................................................................. 44
Interrupts ........................................................................................................................ 45
JTAG Port Pins Reset State ............................................................................................. 49
JTAG Instruction Register Commands ............................................................................... 54
System Control Register Map ........................................................................................... 66
Hibernation Module Register Map ................................................................................... 127
Flash Protection Policy Combinations ............................................................................. 141
Flash Resident Registers ............................................................................................... 143
Flash Register Map ........................................................................................................ 144
GPIO Pad Configuration Examples ................................................................................. 168
GPIO Interrupt Configuration Example ............................................................................ 168
GPIO Register Map ....................................................................................................... 170
Available CCP Pins ........................................................................................................ 207
16-Bit Timer With Prescaler Configurations ..................................................................... 210
Timers Register Map ...................................................................................................... 216
Watchdog Timer Register Map ........................................................................................ 243
Samples and FIFO Depth of Sequencers ........................................................................ 266
Differential Sampling Pairs ............................................................................................. 268
ADC Register Map ......................................................................................................... 271
UART Register Map ....................................................................................................... 304
SSI Register Map .......................................................................................................... 350
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 393
Comparator 0 Operating Modes ...................................................................................... 413
Comparator 1 Operating Modes ...................................................................................... 413
Comparator 2 Operating Modes ...................................................................................... 414
Internal Reference Voltage and ACREFCTL Field Values ................................................. 414
Analog Comparators Register Map ................................................................................. 416
Signals by Pin Number ................................................................................................... 426
Signals by Signal Name ................................................................................................. 430
Signals by Function, Except for GPIO ............................................................................. 435
GPIO Pins and Alternate Functions ................................................................................. 437
Signals by Pin Number ................................................................................................... 439
Signals by Signal Name ................................................................................................. 443
Signals by Function, Except for GPIO ............................................................................. 448
GPIO Pins and Alternate Functions ................................................................................. 451
Temperature Characteristics ........................................................................................... 453
Thermal Characteristics ................................................................................................. 453
Maximum Ratings .......................................................................................................... 454
Recommended DC Operating Conditions ........................................................................ 454
LDO Regulator Characteristics ....................................................................................... 455
Detailed Power Specifications ........................................................................................ 456
2
C Master Timer Period versus Speed Mode ............................................... 379
2
C) Interface Register Map ......................................................... 388
Preliminary
July 26, 2008
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