LM3S1138 Luminary Micro, Inc, LM3S1138 Datasheet - Page 129
![no-image](/images/no-image-200.jpg)
LM3S1138
Manufacturer Part Number
LM3S1138
Description
Lm3s1138 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1138.pdf
(491 pages)
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Reset
Reset
Type
Type
Hibernation RTC Match 0 (HIBRTCM0)
Base 0x400F.C000
Offset 0x004
Type R/W, reset 0xFFFF.FFFF
July 26, 2008
Bit/Field
31:0
R/W
R/W
31
15
1
1
R/W
R/W
Register 2: Hibernation RTC Match 0 (HIBRTCM0), offset 0x004
This register is the 32-bit match 0 register for the RTC counter.
Note:
30
14
1
1
R/W
R/W
RTCM0
29
13
1
1
Name
HIBRTCC, HIBRTCM0, HIBRTCM1, HIBRTCLD, HIBRTCT, and HIBDATA are on the
Hibernation module clock domain and require a delay of t
accesses. See “Register Access Timing” on page 121.
R/W
R/W
28
12
1
1
R/W
R/W
27
11
1
1
Type
R/W
R/W
R/W
26
10
1
1
0xFFFF.FFFF
Reset
R/W
R/W
25
1
9
1
Preliminary
R/W
R/W
24
1
8
1
Description
RTC Match 0
A write loads the value into the RTC match register.
A read returns the current match value.
RTCM0
RTCM0
R/W
R/W
23
1
7
1
R/W
R/W
22
1
6
1
R/W
R/W
21
1
5
1
HIB_REG_WRITE
R/W
R/W
20
1
4
1
LM3S1138 Microcontroller
R/W
R/W
19
1
3
1
between write
R/W
R/W
18
1
2
1
R/W
R/W
17
1
1
1
R/W
R/W
16
1
0
1
129
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