LM3S1138 Luminary Micro, Inc, LM3S1138 Datasheet - Page 296

no-image

LM3S1138

Manufacturer Part Number
LM3S1138
Description
Lm3s1138 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S1138
Manufacturer:
DSP
Quantity:
490
Part Number:
LM3S1138-EQC50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1138-EQC50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1138-IBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1138-IBZ50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1138-IQC50
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1138-IQC50-A2
Manufacturer:
Texas Instruments
Quantity:
135
Part Number:
LM3S1138-IQC50-A2
Manufacturer:
TI/德州仪器
Quantity:
20 000
Part Number:
LM3S1138-IQC50-A2T
Manufacturer:
TI/德州仪器
Quantity:
20 000
Reset
Reset
Type
Type
Analog-to-Digital Converter (ADC)
ADC Sample Sequence Control 3 (ADCSSCTL3)
Base 0x4003.8000
Offset 0x0A4
Type R/W, reset 0x0000.0002
296
Bit/Field
31:4
3
2
1
0
RO
RO
31
15
0
0
Register 26: ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 3. The END bit is always set since there is only one sample in this sequencer.
This register is 4-bits wide and contains information for one possible sample. See the ADCSSCTL0
register on page 287 for detailed bit descriptions.
RO
RO
30
14
0
0
reserved
RO
RO
29
13
0
0
Name
END0
TS0
IE0
D0
RO
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
RO
RO
RO
26
10
0
0
reserved
Reset
0x00
RO
RO
25
0
9
0
0
0
1
0
Preliminary
RO
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
1st Sample Temp Sensor Select
Same definition as TS7 but used during the first sample.
1st Sample Interrupt Enable
Same definition as IE7 but used during the first sample.
1st Sample is End of Sequence
Same definition as END7 but used during the first sample.
Since this sequencer has only one entry, this bit must be set.
1st Sample Diff Input Select
Same definition as D7 but used during the first sample.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
R/W
TS0
RO
19
0
3
0
R/W
RO
IE0
18
0
2
0
July 26, 2008
END0
R/W
RO
17
0
1
1
R/W
RO
D0
16
0
0
0

Related parts for LM3S1138