LM3S1165 Luminary Micro, Inc, LM3S1165 Datasheet - Page 130
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LM3S1165
Manufacturer Part Number
LM3S1165
Description
Lm3s1165 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1165.pdf
(530 pages)
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Hibernation Module
Table 7-1. Hibernation Module Register Map
7.5
130
0x030-
Offset
0x00C
0x01C
0x12C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x024
Name
HIBRTCC
HIBRTCM0
HIBRTCM1
HIBRTCLD
HIBCTL
HIBIM
HIBRIS
HIBMIS
HIBIC
HIBRTCT
HIBDATA
Note:
Register Descriptions
The remainder of this section lists and describes the Hibernation module registers, in numerical
order by address offset.
HIBRTCC, HIBRTCM0, HIBRTCM1, HIBRTCLD, HIBRTCT, and HIBDATA are on the
Hibernation module clock domain and require a delay of t
accesses. See “Register Access Timing” on page 124.
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
0xFFFF.FFFF
0xFFFF.FFFF
0xFFFF.FFFF
0x0000.7FFF
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Preliminary
Description
Hibernation RTC Counter
Hibernation RTC Match 0
Hibernation RTC Match 1
Hibernation RTC Load
Hibernation Control
Hibernation Interrupt Mask
Hibernation Raw Interrupt Status
Hibernation Masked Interrupt Status
Hibernation Interrupt Clear
Hibernation RTC Trim
Hibernation Data
HIB_REG_WRITE
between write
July 26, 2008
page
See
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