LM3S1165 Luminary Micro, Inc, LM3S1165 Datasheet - Page 226
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LM3S1165
Manufacturer Part Number
LM3S1165
Description
Lm3s1165 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1165.pdf
(530 pages)
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Reset
Reset
Type
Type
General-Purpose Timers
GPTM Control (GPTMCTL)
Timer0 base: 0x4003.0000
Timer1 base: 0x4003.1000
Timer2 base: 0x4003.2000
Timer3 base: 0x4003.3000
Offset 0x00C
Type R/W, reset 0x0000.0000
226
Bit/Field
31:15
reserved
14
13
12
RO
RO
31
15
0
0
TBPWML
R/W
Register 4: GPTM Control (GPTMCTL), offset 0x00C
This register is used alongside the GPTMCFG and GMTMTnMR registers to fine-tune the timer
configuration, and to enable other features such as timer stall and the output trigger. The output
trigger can be used to initiate transfers on the ADC module.
RO
30
14
0
0
TBOTE
TBPWML
R/W
reserved
reserved
RO
29
13
TBOTE
0
0
Name
reserved
RO
RO
28
12
0
0
R/W
RO
27
11
0
0
TBEVENT
Type
R/W
R/W
RO
RO
R/W
RO
26
10
0
0
TBSTALL
Reset
0x00
R/W
RO
25
0
9
0
0
0
0
Preliminary
TBEN
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
GPTM TimerB PWM Output Level
The TBPWML values are defined as follows:
GPTM TimerB Output Trigger Enable
The TBOTE values are defined as follows:
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Value
Value
reserved
0
1
0
1
reserved
RO
RO
23
Description
Output is unaffected.
Output is inverted.
Description
The output TimerB trigger is disabled.
The output TimerB trigger is enabled.
0
7
0
TAPWML
R/W
RO
22
0
6
0
TAOTE
R/W
RO
21
0
5
0
RTCEN
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
TAEVENT
R/W
RO
18
0
2
0
TASTALL
July 26, 2008
R/W
RO
17
0
1
0
TAEN
R/W
RO
16
0
0
0
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