LM3S1165 Luminary Micro, Inc, LM3S1165 Datasheet - Page 424
LM3S1165
Manufacturer Part Number
LM3S1165
Description
Lm3s1165 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1165.pdf
(530 pages)
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Analog Comparator
424
Bit/Field
6:5
3:2
4
1
0
reserved
ISLVAL
Name
TSEN
CINV
ISEN
Type
R/W
R/W
R/W
R/W
RO
Reset
0x0
0x0
0
0
0
Preliminary
Description
Trigger Sense
The TSEN field specifies the sense of the comparator output that
generates an ADC event. The sense conditioning is as follows:
Interrupt Sense Level Value
The ISLVAL bit specifies the sense value of the input that generates
an interrupt if in Level Sense mode. If 0, an interrupt is generated if the
comparator output is Low. Otherwise, an interrupt is generated if the
comparator output is High.
Interrupt Sense
The ISEN field specifies the sense of the comparator output that
generates an interrupt. The sense conditioning is as follows:
Comparator Output Invert
The CINV bit conditionally inverts the output of the comparator. If 0, the
output of the comparator is unchanged. If 1, the output of the comparator
is inverted prior to being processed by hardware.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Value
0x0
0x1
0x2
0x3
Value
0x0
0x1
0x2
0x3
Function
Level sense, see TSLVAL
Falling edge
Rising edge
Either edge
Function
Level sense, see ISLVAL
Falling edge
Rising edge
Either edge
July 26, 2008
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