LM3S818 Luminary Micro, Inc, LM3S818 Datasheet - Page 234

• Manufacturer Part Number: LM3S818
• Description: Lm3s818 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Universal Asynchronous Receivers/Transmitters (UARTs)
12.4
Table 12-1. UART Register Map
234
0xFDC
Offset
0x02C
0x03C
0xFD0
0xFD4
0xFD8
0xFE0
0xFE4
0xFE8
0x000
0x004
0x018
0x024
0x028
0x030
0x034
0x038
0x040
0x044
UARTPeriphID4
UARTPeriphID5
UARTPeriphID6
Name
UARTDR
UARTRSR
UARTECR
UARTFR
UARTIBRD
UARTFBRD
UARTLCRH
UARTCTL
UARTIFLS
UARTIM
UARTRIS
UARTMIS
UARTICR
UARTPeriphID7
UARTPeriphID0
UARTPeriphID1
UARTPeriphID2
3.
4.
5.
Register Map
Table 12-1 lists the UART registers. The offset listed is a hexadecimal increment to the register’s
address, relative to that UART’s base address:
Note:
Write the fractional portion of the BRD to the UARTFBRD register.
Write the desired serial parameters to the UARTLCRH register (in this case, a value of
0x00000060).
Enable the UART by setting the UARTEN bit in the UARTCTL register.
UART0: 0x4000C000
UART1: 0x4000D000
The UART must be disabled (see the UARTEN bit in the UARTCTL register on page 246)
before any of the control registers are reprogrammed. When the UART is disabled during
a TX or RX operation, the current transaction is completed prior to the UART stopping.
0x00000000
0x00000000
0x00000090
0x00000000
0x00000000
0x00000000
0x00000300
0x00000012
0x00000000
0x0000000F
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000018
0x00000011
Reset
Type
W1C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Preliminary
Description
Data
Receive Status (read)
Error Clear (write)
Flag Register (read only)
Integer Baud-Rate Divisor
Fractional Baud-Rate Divisor
Line Control Register, High byte
Control Register
Interrupt FIFO Level Select
Interrupt Mask
Raw Interrupt Status
Masked Interrupt Status
Interrupt Clear
Peripheral identification 4
Peripheral identification 5
Peripheral identification 6
Peripheral identification 7
Peripheral identification 0
Peripheral identification 1
Peripheral identification 2
February 6, 2007
page
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