LM3S818 Luminary Micro, Inc, LM3S818 Datasheet - Page 309

• Manufacturer Part Number: LM3S818
• Description: Lm3s818 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

February 6, 2007
Reset
Reset
Type
Type
Bit/Field
31:12
10:9
Analog Comparator Control 0 (ACCTL0)
Offset 0x024
3:2
11
8
4
RO
RO
31
15
0
0
Register 6: Analog Comparator Control 0 (ACCTL0), offset 0x24
This register configures that comparator’s input and output.
RO
RO
30
14
0
0
reserved
reserved
reserved
ASRCP
ISLVAL
TOEN
Name
ISEN
RO
RO
29
13
0
0
RO
RO
28
12
0
0
TOEN
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
27
11
0
0
R/W
RO
RO
26
10
0
0
0
ASRCP
Reset
0
0
0
0
0
0
R/W
RO
RO
25
0
9
0
0
Preliminary
reserved
RO
RO
RO
24
Description
Reserved bits return an indeterminate value, and should
never be changed.
The TOEN bit enables the ADC event transmission to the
ADC. If 0, the event is suppressed and not sent to the ADC. If
1, the event is transmitted to the ADC.
The ASRCP field specifies the source of input voltage to the
VIN+ terminal of the comparator. The encodings for this field
are as follows:
Reserved bits return an indeterminate value, and should
never be changed.
The ISLVAL bit specifies the sense value of the input that
generates an interrupt if in Level Sense mode. If 0, an
interrupt is generated if the comparator output is Low.
Otherwise, an interrupt is generated if the comparator output
is High.
The ISEN field specifies the sense of the comparator output
that generates an interrupt. The sense conditioning is as
follows:
0
8
0
0
reserved
ASRCP
00
01
10
11
TSLVAL
ISEN
00
01
10
R/W
11
RO
RO
23
0
7
0
0
Function
Pin value
Pin value of C0+
Internal voltage reference
Reserved
R/W
RO
RO
22
0
6
0
0
Function
Level sense, see ISLVAL
Falling edge
Rising edge
Either edge
TSEN
R/W
RO
RO
21
0
5
0
0
ISLVAL
R/W
RO
RO
20
0
4
0
0
R/W
RO
RO
19
0
3
0
0
ISEN
LM3S818 Data Sheet
R/W
RO
RO
18
0
2
0
0
CINV
R/W
RO
RO
17
0
1
0
0
reserved
RO
RO
RO
16
0
0
0
0
309