MT28F128J3FS-12 ET Micron, MT28F128J3FS-12 ET Datasheet - Page 22
MT28F128J3FS-12 ET
Manufacturer Part Number
MT28F128J3FS-12 ET
Description
128Mb Q-Flash - OBSOLETE
Manufacturer
Micron
Datasheet
1.MT28F128J3FS-12_ET.pdf
(55 pages)
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Table 14: Protection Register Information
NOTE:
Table 15: Burst READ Information
NOTE:
09005aef80b5a323
MT28F640J3.fm – Rev. N 3/05 EN
1. The variable “P” is a pointer which is defined at CFI offset 15h.
1. The variable “P” is a pointer which is defined at CFI offset 15h.
OFFSET
OFFSET
P = 31h
P = 31h
(P+10)h
(P+11)h
(P+12)h
(P+13)h
(P+14)h
(P+15)h
(P+E)h
(P+F)h
1
1
DESCRIPTION
(Optional Flash Features and Commands)
DESCRIPTION
(Optional Flash Features and Commands)
Number of protection register fields in JEDEC ID space. “00h” indicates
that 256 protection bytes are available.
Protection Field 1: Protection Description
This field describes user-available, one-time programmable (OTP)
protection register bytes. Some are pre-programmed with device-unique
serial numbers; others are user-programmable. Bits 0–15 point to the
protection register lock byte, the section’s first byte.
The following bytes are factory-pre-programmed and user-programmable.
Bits 0–7 Lock/bytes JEDEC-plane physical low address
Bits 8–15 Lock/bytes JEDEC-plane physical high address
Bits 16–23 “n” such that 2n = factory pre-programmed bytes
Bits 24–31 “n” such that 2n = user-programmable bytes
Page Mode Read Capability
Bits 0–7 = “n” such that 2n Hex value represents the number of read page
bytes. See offset 28h for device word width to determine page mode data
output width. 00h indicates no read page buffer.
Number of synchronous mode read configuration fields that follow. 00h
indicates no burst capability.
Reserved for future use.
22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128Mb, 64Mb, 32Mb
ADDRESS
ADDRESS
Q-FLASH MEMORY
40h
44h
45h
46h
3Fh
HEX
HEX
01
00
03
00
©2000 Micron Technology. Inc.
VALUE
VALUE
CODE
CODE
8 byte
00h
01
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