CS8406 Cirrus Logic, CS8406 Datasheet - Page 19
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CS8406
Manufacturer Part Number
CS8406
Description
192 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER
Manufacturer
Cirrus Logic
Datasheet
1.CS8406.pdf
(43 pages)
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CS8406
6.
CONTROL PORT DESCRIPTION
The control port is used to access the registers, allowing the CS8406 to be configured for the
desired operational modes and formats. The operation of the control port may be completely
asynchronous with respect to the audio sample rates. However, to avoid potential interference
problems, the control port pins should remain static if no operation is required.
The control port has 2 modes: SPI and I²C, with the CS8406 acting as a slave device. SPI mode
is selected if there is a high to low transition on the AD0/CS pin, after the RST pin has been
brought high. I²C mode is selected by connecting the AD0/CS pin through a resistor to VL or
GND, thereby permanently selecting the desired AD0 bit address state.
6.1.
SPI Mode
In SPI mode, CS is the CS8406 chip select signal, CCLK is the control port bit clock (input into
the CS8406 from the microcontroller), CDIN is the input data line from the microcontroller, CD-
OUT is the output data line to the microcontroller. Data is clocked in on the rising edge of CCLK
and out on the falling edge.
Figure 9 shows the operation of the control port in SPI mode. To write to a register, bring CS low.
The first seven bits on CDIN form the chip address and must be 0010000. The eighth bit is a
read/write indicator (R/W), which should be low to write. The next eight bits form the Memory Ad-
dress Pointer (MAP), which is set to the address of the register that is to be updated. The next
eight bits are the data which will be placed into the register designated by the MAP. During writes,
the CDOUT output stays in the Hi-Z state. It may be externally pulled high or low with a 47 k Ω
resistor, if desired.
There is a MAP auto increment capability, enabled by the INCR bit in the MAP register. If INCR
is a zero, the MAP will stay constant for successive read or writes. If INCR is set to a 1, the MAP
will autoincrement after each byte is read or written, allowing block reads or writes of successive
registers.
To read a register, the MAP has to be set to the correct address by executing a partial write cycle
which finishes (CS high) immediately after the MAP byte. The MAP auto increment bit (INCR)
may be set or not, as desired. To begin a read, bring CS low, send out the chip address and set
CS
C C L K
C H IP
C H I P
M A P
DATA
A D D R E S S
ADDRESS
0010000
LSB
0010000
MSB
R/W
R/W
C D I N
b y te 1
b y te n
High Impedance
LSB MSB
MSB
LSB
C D O U T
MAP = Memory Address Pointer, 8 bits, MSB first
Figure 9. Control Port Timing in SPI Mode
DS580F1
19