ds26504 Maxim Integrated Products, Inc., ds26504 Datasheet - Page 54

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ds26504

Manufacturer Part Number
ds26504
Description
Ds26504 T1/e1/j1/64kcc Bits Element
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bit 0: Receive Payload Clock Output Enable (RPCOE). Setting this bit enables a gapped receive clock at the RCLK pin. In
E1 mode, the clock is gapped during TS0 and TS16. In T1 mode, the clock is gapped during the F-Bit. Note: This function is
only available in T1 or E1 mode.
Bit 1: Transmit Payload Clock Output Enable (TPCOE). Setting this bit enables a gapped transmit clock at the TCLKO
pin. In E1 mode, the clock is gapped during TS0 and TS16. In T1 mode, the clock is gapped during the F-Bit. Note: This
function is only available in T1 or E1 mode.
Bits 2 and 3: Unused, must be set = 0 for proper operation.
Bit 4: TS_8K_4 Invert (TS_8K_4INV)
Bit 5: RS_8K Invert (RS_8KINV)
Bit 6: TCLK Invert (TCLKINV)
Bit 7: RCLK Invert (RCLKINV)
0 = no inversion
1 = invert
0 = no inversion
1 = invert
0 = no inversion
1 = invert
0 = no inversion
1 = invert
RCLKINV
7
0
0
TCLKINV
IOCR2
I/O Configuration Register 2
02h
6
0
0
RS_8KINV
5
0
0
TS_8K_4INV
54 of 128
4
0
0
3
0
0
2
0
0
TPCOE
1
0
0
RPCOE
0
0
0

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