upd161608 Renesas Electronics Corporation., upd161608 Datasheet
upd161608
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upd161608 Summary of contents
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DRIVER IC FOR 262,144-COLOR DESCRIPTION μ The PD161608 is TFT-LCD display driver IC. Also possible by 176-RGB x 220-dot to display 262,144 colors. FEATURES • 176-RGB x 220-dot TFT-LCD display driver IC for 262,144 ...
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BLOCK DIAGRAM <R> 220ch-gate driver Level shifter control VLCD63 EXVR VCIX2 VCI2 CXP CXN CYP CYN C1P Bulit-in power supply C1N circuit C2P C2N C3P C3N V SS VGH VGL VCOML VCOMR VCOM VCOMH VCI Power regulator RVDD V ...
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PAD CONFIGURATION 1 20960 μm 277 μm Pad size: 35 μ μm, The number of pad μm Remark NC: No Connection 1400 μm 1043 1042 +Y +X BUMP Side Up 279 278 ...
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Items Chip size μ (With scribe lane: 100 Chip thickness Pad pitch Bump pad size Bump height 4 Table 2−1. Pad Dimensions Pad Name − m) − 277 278, 279, 1042, 1043 280 to 1041 1 to 277 ...
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Figure 2−1. Alignment Mark Configurations (unit Center (−10368, 310 Center (−10347, −340) Data Sheet S17594EJ2V0DS μ PD161608 μ Center (10368, 310 Center (10347, −340) 5 ...
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Pad No. Name X Y Pad No -10350 -520 61 CXP 2 NC -10275 -520 62 CXP 3 VCOM -10200 -520 63 CXP 4 VCOM -10125 -520 64 VCOML 5 VCOM -10050 -520 65 VCOML 6 DUMMY -9975 ...
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Pad No. Name X Y Pad No. Name 241 GG0 7650 -520 301 G43 242 GG0 7725 -520 302 G45 243 GG0 7800 -520 303 G47 244 BB0 7875 -520 304 G49 245 BB0 7950 -520 305 G51 246 BB0 ...
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Pad No. Name X Y Pad No. 481 S441 4846.5 444 541 S381 482 S440 4819.5 574 542 S380 483 S439 4792.5 444 543 S379 484 S438 4765.5 574 544 S378 485 S437 4738.5 444 545 S377 486 S436 4711.5 ...
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Pad No. Name X Y Pad No. Name 721 S205 -1633.5 444 781 S145 722 S204 -1660.5 574 782 S144 723 S203 -1687.5 444 783 S143 724 S202 -1714.5 574 784 S142 725 S201 -1741.5 444 785 S141 726 S200 ...
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Pad No. Name 961 G154 962 G152 963 G150 964 G148 965 G146 966 G144 967 G142 968 G140 969 G138 970 G136 971 G134 972 G132 973 G130 974 G128 975 G126 976 G124 977 G122 978 G120 979 ...
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Table 2−3. Test Pad Coordinate (no bump) Pad No Remark These pins belong to no bumps. Therefore, there are not above mentioned pins ...
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PIN DESCRIPTIONS 3.1 Power Supply Pins Symbol Pad No. I/O − V 57, 148 to 151 DD − V 153, 154, 170, DDIO 176, 182, 188, 207 − V 21, 48, 49, 113 to SS 120, 122 to 125, ...
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Interface Pins Symbol Pad No. I/O RL 189, 190 Input TB 186, 187 Input BGR 183, 184 Input REV 180, 181 Input SHUT 192 to 194 Input CM 262 to 264 Input CSB 161 to 163 Input <R> SCK ...
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Symbol Pad No. I/O RR [5:0], 208 to 225, Input GG [5:0], 226 to 243, BB [5:0] 244 to 261 HSYNC 198 to 206 Input 201 to 203 VSYNC Input RESETB 164 to 166 Input 3.3 Display Pins Symbol Pad ...
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FUNCTIONAL DESCRIPTION 4.1 External Interface (RGB Interface) μ The PD161608 supports RGB interface as an external interface for motion picture display. RGB display data of one line (S0 to S527) are latched to the data latch register through parallel ...
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POWER SUPPLY CIRCUIT Figure 5−1 shows a configuration of the voltage generation circuit for the <R> consist of DC/DC converter circuits 1, 2 and 3. DC/DC converter circuit 1 doubles the voltage supplied to VCI, and that voltage is ...
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Pattern Diagrams for Voltage Setting The following figure shows a pattern diagram of the voltage setting and an example of waveforms. VCIX2 VCI Reference (2 VCI2 Caution Adjust the conditions of VCIX2-VVLD63 > 0.5 V and ...
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Recommendation Wiring Resistance Value to Each Pin The wiring resistance value to recommend is shown below. Since wiring resistance influences the current capability of a power supply, it asks for panel design so that it may become below recommendation ...
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Recommendation Capacitance Value to Each Pin The recommendation value of a capacitor is shown below. Please determine a capacity value, after a module fully evaluates. 5.4 Recommendation of a Schottky Diode It recommends inserting a schottky diode between VCI-VCIX2, ...
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EXTERNAL DISPLAY INTERFACE 6.1 RGB Interface The following interfaces are available as external display interface. Figure 6−1. Interface Signal Mapping from Graphic Controller 6.2 18-bit RGB Interface Display operation is synchronized with VSYNC, HSYNC, and DOTCLK signals. Data for ...
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Figure 6−3. 18-bit RGB Interface Timing DOTCLK RGB RGB PD [17: HSYNC ENABLE 176* DOTCLK (18-bits bus I/F) RGB RGB RGB RGB RGB 3a 4a 174a 175a 176a N line Valid data transfer area Data Sheet S17594EJ2V0DS μ ...
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SYSTEM INTERFACE 7.1 Serial Data Transfer It indicates serial data transfer as follows. μ (1) The PD161608 initiates serial data transfer by transferring the start byte at the falling edge of CSB input. It ends serial data transfer at ...
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Procedure for Transfer on Clock Synchronized Serial Bus Interface Figure 7−2. Timing Basic Data Transfer through Clock-Synchronized Serial Bus Interface Transfer start CSB (Input SCK (Input) SDI (Input) Device ...
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TIMING SPECIFICATION μ The PD161608 executes power up/down by internal sequential timing. Following table shows AC timing characteristics and Figure 8−1 shows horizontal/vertical pixel clock timing (262 K-Full Screen Timing). 8.1 AC Timing Requirements 260 K-color mode and common ...
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Figure 8−1. 262 K-Full Screen Timing Horizontal timing HBP = 10 DOTCLK HSYNC ENABLE DATA Dummy Vertical timing VBP = 3 VSYNC HSYNC ENABLE Pixel clock timing VSYNC HSYNC DOTCLK DATA Hcycle = 196 HDISP = 176 HFP = 10 ...
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VBP = 3 VSYNC HSYNC Line 0 ENABLE MODE conversion timing CM VSYNC Color 262 K-color mode MODE 26 Figure 8−2. 8-color Mode Timing Vcycle = 224 Line VDISP = 220 Line Line 219 VPBP VPDSP ...
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POWER UP SEQUENCE μ The PD161608 operates power up and display following figure. <R> DDIO t DD-CI VCI /RES t RS-SHUT t P-SHUT SHUT t CLK-SHUT DOTCLK HSYNC VSYNC Display high voltage DISP ...
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RECOVERY SEQUENCE WHEN A POWER SUPPLY TURNS OFF MOMENTARILY μ The PD161608 operates power up and display following figure when a power supply turns off momentarily <R> V DDIO VCI /RES SHUT DOTCLK HSYNC ...
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POWER DOWN SEQUENCE μ The PD161608 operates power off and display OFF by VDD, SHUT, DOTCLK, HSYNC, and SYNC as shown as following figure. <R> DDIO VCI SHUT DOTCLK HSYNC VSYNC Display high voltage DISP Normal ...
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INSTRUCTIONS 12.1 Outline μ The operation of the PD161608 is determined by signals sent through Serial Peripheral Interface (SPI). These signals, which include the register selection signal (RS), the read/write signal (R/W), and the internal 16-bit data bus signals ...
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Instruction Table IB15 IB14 IB13 Register No. Register Name - Index * * * - Status Read 01H 0 0 REV Driver Output Control 02H LCD Driving Waveform Control 03H DCT3 DCT2 ...
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INSTRUCTION DESCRIPTIONS Ensure that you are aware of the assignments of instruction bits (IB15-IB0) for each interface that are illustrated below. 13.1 Index Register (IR) The index instruction specifies the control register indexes (R00H to R7DH). It sets the ...
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TB: Selects the output shift direction of the gate driver G219 shifts to G0 shifts to G219. RL: Selects the output shift direction of the source driver Start point: S527, ...
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BGR: Selects the <R><G><B> arrangement. BGR = 0: <R><G><B> color is assigned from S0. BGR = 1: <B><G><R> color is assigned from S0 BGR = BGR = ...
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LCD Driving Waveform Control (R02H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 B/C: When B performs scanniing in every frame for LCD drive. When B n-raster-row inversion waveform ...
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Power Supply Control 1 (R03H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 W 1 DCT3 DCT2 DCT1 DCT0 DCT3-DCT0: Set the step-up cycle of the step-up circuit for 8-color mode ( the driving ability of the ...
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BT2-BT0: The output factor of step-up is switched. Adjust scale factor of the DC/DC converter circuit by the voltage used. BT2 BT1 BT0 ...
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AP2-AP0: Adjust the amount of current from the stable-current source in the internal operational amplifier circuit. When the amount of current becomes large, the driving ability of the operational-amplifier circuits increase. Adjust the current taking into account the power consumption. ...
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Frame Cycle Control (R0BH) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 W 1 NO1 NO0 SDT1 SDT0 NO1, NO0: Set the gate non-overlap period. NO1 NO0 Remark Clock cycle: DOTCLK cycle SDT1, SDT0: Specify ...
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VCOM (VEQ) Note Note The signal in parenthesis are shown internal signal period Equalizing period A EQ [1:0] NO [1:0] Non overlap time Hi-Z SDT [1:0] Source output delay time Data ...
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Power Supply Control 3 (R0DH) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 NOTP1: NOTP1 becomes “0” after power on reset and VLCD63 voltage becomes programmed EEPROM value. When NOTP1 set to “1”, setting ...
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Power Supply Control 4 (R0EH) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 W 1 VDV4 NOTP2 VCOMG Dummy2 NOTP2: NOTP2 becomes “0” after power on reset and VCOM amplitude voltage becomes programmed EEPROM value. When NOTP1 set to ...
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Gate Scan Start Position (R0FH) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 SCN7-SCN0: Set the scanning starting position of the gate driver. G0 NEC Electronics G219 SCN [7:0] = 00000000 13.10 Horizontal Porch ...
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Vertical Porch (R17H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 VBP7-VBP0: Set the delay period from falling edge of VSYNC to first valid line. The line data within this delay period will be ...
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Software Reset (R28H) Register can be reset to its POR default values upon the following sequence are completed. Step Resister 1 R28H 0006 2 R28H 000E 3 R28H 0000 Caution All other above settings of R28H are reserved. Therefore, ...
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Power Supply Control 6 (R52H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 W 1 DCSEL VGHON VCI2ON VGLON VCIX2ON DCSEL: This flag selects power set-up mode as follows. DCSEL = 0: Auto sequence mode OFF, VGHON/VCIX2ON/VCI2ON/VGLON/VL63ON are valid. ...
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VGH OFF Setting (R54H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 VGHOFF: This flag control VGH output as follows. VGHOFF = 0: Normal operation VGHOFF = 1: VGH halt (VCIX2 voltage level is ...
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EEPROM Operation Control (R61H) R/W RS IB15 IB14 IB13 IB12 IB11 IB10 IE2OPC2-IE2OPC0: Control the access to EEPROM as follow table. For more detail, refer to 22. EEPROM ACCESS. IE2OPC2 IE2OPC1 ...
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GAMMA ADJUSTMENT FUNCTION μ The PD161608 provides the gamma adjustment function to display 262,144 colors simultaneously. The gamma adjustment executed by the gray-scale adjustment register and the micro-adjustment register that determines 8 gray-scale levels. Furthermore, since the gray-scale adjustment ...
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STRUCTURE OF GRAY-SCALE AMPLIFIER The structure of gray-scale amplifier is shown as below. 8-voltage-level (VINP0/VINP7-VINN0/VINN7) between VLCD63 and EXVR are determined by the gray-scale adjustment register and the micro adjustment register. Each level is split into 8 levels again ...
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Figure 15−2. Structure of Resistor Ladder Network Selector VLCD63 VRP0 VRP0 [ 30R KVP0 VINP0 PKP0 [ RP0 KVP1 RP1 KVP2 RP2 KVP3 RP3 KVP4 VINP1 4R SEL RP4 KVP5 ...
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GAMMA ADJUSTMENT REGISTER The gamma adjustment register sets up the gray-scale voltage adjusting to the gamma specification of the LCD panel. This register can set positive/negative polarities independently. There are 3 types of register groups to adjust gray-scale and ...
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Table 16−1. Gamma Adjusting Register Register Group Positive Polarity PRP02 to PRP00 Gray-scale adjustment PRP12 to PRP10 Reference adjustment VRP03 to VRP00 Amplitude adjustment VRP14 to VRP10 PKP02 to PKP00 PKP12 to PKP10 PKP22 to PKP20 Micro-adjustment PKP32 to PKP30 ...
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LADDER RESISTOR / SELECTOR The ladder resistor / selector outputs the reference voltage of the gray-scale voltage. There are two ladder resistor networks including variable resistor and the selector selecting ...
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Table 17−4. Amplitude Adjustment Register Value VRP(N)1 [4:0] 00000 00001 00010 : 10110 10111 11000 : 11101 11110 11111 Data Sheet S17594EJ2V0DS μ PD161608 Resistance Value VRP(N Step = 1R : 22R 23R 24R : Step ...
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THE SELECTOR By the selector, one of the voltage levels given by the ladder resistor network and the micro-adjusting register is selected. The selector outputs one of the six types ...
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Table 18−2. Gamma Adjusting Voltage Formula (Positive Polarity) Pins VLCD63-ΔV*VRP0/SUMRP KVP0 VLCD63-ΔV*(VRP0+5R)/SUMRP KVP1 VLCD63-ΔV*(VRP0+9)/SUMRP KVP2 VLCD63-ΔV*(VRP0+13R)/SUMRP KVP3 VLCD63-ΔV*(VRP0+17R)/SUMRP KVP4 VLCD63-ΔV*(VRP0+21R)/SUMRP KVP5 VLCD63-ΔV*(VRP0+25R)/SUMRP KVP6 KVP7 VLCD63-ΔV*(VRP0+29R)/SUMRP VLCD63-ΔV*(VRP0+33R)/SUMRP KVP8 VLCD63-ΔV*(VRP0+33R+VRHP)/SUMRP KVP9 VLCD63-ΔV*(VRP0+34R+VRHP)/SUMRP KVP10 VLCD63-ΔV*(VRP0+35R+VRHP)/SUMRP KVP11 VLCD63-ΔV*(VRP0+36R+VRHP)/SUMRP KVP12 VLCD63-ΔV*(VRP0+37R+VRHP)/SUMRP KVP13 VLCD63-ΔV*(VRP0+38R+VRHP)/SUMRP KVP14 VLCD63-ΔV*(VRP0+39R+VRHP)/SUMRP ...
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Table 18−3. Gamma Voltage Formula (Positive Polarity) Gray-scale Voltage V8+(V1-V8)*(30/48) V3 V8+(V1-V8)*(23/48) V4 V8+(V1-V8)*(16/48) V5 V8+(V1-V8)*(12/48) V6 V8+(V1-V8)*(8/48) V7 V8+(V1-V8)*(4/48 V20+(V8-V20)*(22/24) V10 V20+(V8-V20)*(20/24) V11 V20+(V8-V20)*(18/24) V12 V20+(V8-V20)*(16/24) V13 V20+(V8-V20)*(14/24) V14 V20+(V8-V20)*(12/24) V15 V20+(V8-V20)*(10/24) V16 V20+(V8-V20)*(8/24) ...
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Table 18−4. Gamma Adjusting Voltage Formula (Negative Polarity) Pins VLCD63-ΔV*VRN0/SUMRN KVN0 VLCD63-ΔV*(VRN0+5R)/SUMRN KVN1 VLCD63-ΔV*(VRN0+9)/SUMRN KVN2 VLCD63-ΔV*(VRN0+13R)/SUMRN KVN3 VLCD63-ΔV*(VRN0+17R)/SUMRN KVN4 KVN5 VLCD63-ΔV*(VRN0+21R)/SUMRN VLCD63-ΔV*(VRN0+25R)/SUMRN KVN6 VLCD63-ΔV*(VRN0+29R)/SUMRN KVN7 VLCD63-ΔV*(VRN0+33R)/SUMRN KVN8 VLCD63-ΔV*(VRN0+33R+VRHN)/SUMRN KVN9 VLCD63-ΔV*(VRN0+34R+VRHN)/SUMRN KVN10 VLCD63-ΔV*(VRN0+35R+VRHN)/SUMRN KVN11 VLCD63-ΔV*(VRN0+36R+VRHN)/SUMRN KVN12 VLCD63-ΔV*(VRN0+37R+VRHN)/SUMRN KVN13 VLCD63-ΔV*(VRN0+38R+VRHN)/SUMRN KVN14 VLCD63-ΔV*(VRN0+39R+VRHN)/SUMRN ...
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Table 18−5. Gamma Voltage Formula (Negative Polarity) Gray-scale Voltage V8+(V1-V8)*(30/48) V3 V8+(V1-V8)*(23/48) V4 V8+(V1-V8)*(16/48) V5 V8+(V1-V8)*(12/48) V6 V8+(V1-V8)*(8/48) V7 V8+(V1-V8)*(4/48 V20+(V8-V20)*(22/24) V10 V20+(V8-V20)*(20/24) V11 V20+(V8-V20)*(18/24) V12 V20+(V8-V20)*(16/24) V13 V20+(V8-V20)*(14/24) V14 V20+(V8-V20)*(12/24) V15 V20+(V8-V20)*(10/24) V16 V20+(V8-V20)*(8/24) ...
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Figure 18−1. Relationship between Input Data and Output Voltage V0 Positive polarity (REV = 1) Negative polarity (REV = 0) V63 000000 Figure 18−2. Relationship between Source Output and COMOUT Data Sheet S17594EJ2V0DS Input data COMOUT Negative ...
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THE 8-COLOR DISPLAY MODE μ The PD161608 builds in 8-color display mode. Displaying the gray-scale levels in 8-color display mode, gray-scale amplifier and driver amplifier are halt. So that it attempts to lower power consumption. MSB R05 R04 R03 ...
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REVERSED AC DRIVER μ The PD161608 supports not only the LCD reversed AC drive in a one-frame unit but also the n-raster-row reversed AC drive which alternates in an n-raster-row unit from one to 128 raster-rows. When a ...
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AC TIMING Following diagram indicates the AC timing on the each AC drive method. After every 1 drawing, the AC timing is occurred on the reversed frame AC drive. After the AC timing, the blank (all outputs from the ...
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EEPROM ACCESS μ The PD161608 builds in EEPROM for storing the internal register setting as following table. And the this EEPROM setting value as default value, when set each NOTP1 (R0DH), NOTP2 (R0EH), NOTP3 (R1EH), NOTP4 (R30H) bits to ...
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EEPROM Erase/Write Sequence (Internal power supply mode) μ The PD161608 is able to select the power source for EEPROM erase/write. When EP_PWR (R60H internal power supply mode is selected. In this mode, operation. For more detail scheme, ...
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EEPROM Compare Sequence (COMP) μ The PD161608 has the register (R70H-R7DH) which carries out the monitor of the contents of the EEPROM. By the following sequences, read the contents of R70H-R7DH and compare by comparing with the data which ...
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Initial Status before EEPROM Write Serial Register map Register Register Name D15 D14 D13 Address R0DH Power Control ( R0EH Power Control (4) NOTP2 Dummy2 VCOMG R1EH Power Control ( R30H r-Control (1) ...
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Example of after EEPROM Write Status The example that R1EH (Power control 5) register is set by the customer is shown below. Serial Register map R1EH is set by the customer. Register Register Name D15 D14 D13 Address R0DH ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = 25° Parameter Power supply voltage Power supply voltage Power supply voltage Power supply voltage Power supply voltage Power supply voltage Power supply voltage Input voltage Input current Output current Operating ...
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EEPROM Rewrite cycle Characteristics Symbol Rewrite cycle −20 to +70°C) DC Characteristics ( Characteristics Symbol I VDDIOS Leakage Current I VCIS ΔCOMH ΔCOML VGH LCD driving voltage VGL VLCD63 ΔVLCD63 Input ...
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DC Characteristics for LCD driver output (V Characteristics Symbol 1st step-up input voltage VCI 1st step-up output efficiency VCIX2 2nd step-up input voltage VCI 2nd step-up output efficiency VGH VGL 3rd step-up input voltage VCI 3rd step-up output efficiency VCI2 ...
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RGB Data Interface Characteristics (T Characteristics Symbol DOTCLK cycle time t DCYC DOTCLK pulse width high t DCHW DOTCLK pulse width low t DCLW ENABLE setup time t ENS ENABLE hold time t ENH PD data setup time t PDS ...
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Clock Synchronized Serial Mode Characteristics (T Characteristics Symbol Serial clock cycle time (write) t SYNC Serial clock cycle time (read) t SYNC Serial clock rise/fall time Pulse width high for write t SCHW Pulse width ...
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Figure 23−2. AC Characteristics (SPI mode) Transfer start CSB CSS V IH SCK SDI t SDO Figure 23−3. AC characteristics (RESET Mode) RESETB SCYC SCLW SCLR ...
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VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care to prevent chattering noise ...
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Reference Documents NEC Semiconductor Device Reliability/Quality Control System (C10983E) Quality Grades On NEC Semiconductor Devices (C11531E) • The information in this document is current as of June 2006. The information is subject to change without notice. For actual design-in, refer ...