upd72872 Renesas Electronics Corporation., upd72872 Datasheet - Page 26

• Manufacturer Part Number: upd72872
• Description: Ieee1394 1-chip Ohci Host Controller
• Manufacturer: Renesas Electronics Corporation.

3.1.23 Offset_64
26
1,0
7-2
8
12-9
14,13
15
This is a 16-bit read-only register that provides control status information of the µ PD72872.
Bits
Power Management Control/Status Register
R/W
R/W
R/W
R/W
R
R
R
PowerState Default value is undefined. This field is used both to determine the current power
state of the µ PD72872 and to set the µ PD72872 into a new power state. As D1 is not
supported in the current implementation of the µ PD72872, writing of ‘01’ will be ignored.
The LPS is a PHY/Link interface signal and is defined in P1394a draft 2.0. It is an internal
signal in the µ PD72872.
Reserved Constant value of 000000.
PME_En Default value of 0. This field is used to enable the specific power management
features of the µ PD72872.
Data_Select Constant value of 0000.
Data_Scale Constant value of 00.
PME_Status Default value is undefined. A write of ‘1’ clears this bit, while a write of ‘0’ is
ignored.
00: D0 (DMA contexts: ON, Link Layer: ON)
01: Reserved (D1 state not supported)
10: D2 (DMA contexts: OFF, Link Layer: OFF, LPS: OFF, PME will be asserted upon
11: D3 (DMA contexts: OFF, Link Layer: OFF, LPS: OFF, PME will be asserted upon
LinkON being active)
LinkON being active)
Data Sheet S14793EJ1V0DS
Description