rs5c62 RICOH Co.,Ltd., rs5c62 Datasheet - Page 12

• Manufacturer Part Number: rs5c62
• Description: Real-time Clock
• Manufacturer: RICOH Co.,Ltd.

8
RP/RF/RS5C62
2.2 Control Register 2 (BANK0/1 at “Eh”)
*
*
*
BSY
1) The BSY bit is intended for only read operation and is not intended for write operation.
2) The XSTP bit is used to detect the stop of the crystal oscillator. The XSTP bit is set to “1” upon the stop of oscillation and held at “1” after the restart
3) When the ALEN bit is set to “1”, the ALFG bit is also set to “1” upon output of an alarm interrupt from the INTR pin (while it is held low).
D3
*
*
of oscillation. Upon detection of the stop of oscillation, the built-in timer counter is reset (because the TM
reset).
1
CTFG
CTFG
D2
ALFG
ALFG
D1
Alarm time match indication bit *
Cyclic interrupt indication bit *
Time/calendar counter state indication bit *
ALFG
CTFG
XSTP
XSTP
BSY
D0
0
1
0
1
0
1
Oscillation stop detection bit *
(For write operation)
(For read operation)
Indicates an alarm interrupt is disabled or indicates mismatching between clock
time and alarm time (upon turning off the INTR pin). Intended for setting to “0”.
I
INTR pin). Not intended for setting to “0”.
Indicates that the INTR pin is turned off. Intended for setting to “0” in the level
mode.
Indicates that the INTR pin is driven low. Not intended for setting to “0”.
Indicates the normal state of the time and calendar counters (no carry or no
reset pulse).
Indicates the busy state of the time and calendar counters (a carry or a reset
pulse generated).
XSTP
ndicates matching between clock time and alarm time (upon driving low the
0
1
Indicates the progress of oscillation. Intended for setting to “0”.
Indicates the stop of oscillation. Not intended for setting to “1”.
4
3
2
5
Function
Function
Function
Function
3
bit in the timer clock selection register is