rs5c62 RICOH Co.,Ltd., rs5c62 Datasheet - Page 36

• Manufacturer Part Number: rs5c62
• Description: Real-time Clock
• Manufacturer: RICOH Co.,Ltd.

32
RP/RF/RS5C62
11.2-2 Reading from Time and Calendar Counters by Generating Cyclic Interrupt
11.2-3 Reading from Time and Calendar Counters by Dual Reading
11.3 Writing Alarm Time to Alarm Registers
*
1
*
1
Output cyclic interrupt from
INTR pin
Read from the time and
calendar counters (starting
with address “1h” and
ending with address “Ch”)
Read 1-second digit again
Read from time and
calendar counters
(in minutes and hours)
Read 1-second digit
CTFG
Write alarm time
CTFG=0?
Dual readings
ALEN
BANK
ALEN
match?
YES
YES
0
0
1
1
NO Proceed to
NO
*
1
interrupt from
other ICs
*
2
This typical process of reading from the time and calendar
counters is applied on the conditions below:
1) The INTR pin is set to the level mode (upon setting the CT
2) The route marked with “
*
*
*
1)
2)
1) Non-existent alarm time may be set in the alarm register, provided that an
interrupt cycle selection register).
cycle minus 30.5µs (for the purpose of preventing occurrence of an error
due to a carry during reading from the time and calendar counters).
A carry from the second digit starts with 1 second via 10 seconds,---and
1 year, and ends with 10 years. Consequently, reading from the time
and calendar counters must also start with the 10-second digit (at
address “1h” ) and end with the 10-year digit (at address “Ch” ).
This route assumes that an error occurs due to a carry during reading
from the time and calendar counters.
alarm interrupt is disabled. To enable an alarm interrupt, existent alarm
time must be set in the alarm register.
*
1” lasts within the time equivalent to a preset
3
to “1” in the