mrf24j40 Microchip Technology Inc., mrf24j40 Datasheet - Page 33

• Manufacturer Part Number: mrf24j40
• Description: Ieee 802.15.4? 2.4 Ghz Rf Transceiver
• Manufacturer: Microchip Technology Inc.

7.2.2
When a transmission completes, the TXIF flag of the
ISRSTS register will become set. Once the TXIF bit is
set, the status of the transmission is located in the
TXSR register.
REGISTER 7-2:
7.3
The following section details the reception of a
non-secured frame. When the MRF24J40 receives a
packet that passes the MAC layer addressing, thresh-
old and packet type filters, it will indicate the reception
of this packet to the host controller by setting the RXIF
bit (ISRSTS<3>). The packet will remain in the buffer
until the host frees the buffer. No other packets can be
received while the buffer is holding a packet.
7.4
The RX MAC block will do CRC checking, parse the
received frame type and address recognition, then
store the received frame into RX FIFO. In addition to
the IEEE 802.15.4 packet, there are also 2 bytes of
information that are appended to the end of the packet
after the FCS field: LQI and RSSI.
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4-0
R-0
TXRETRY<7:6>
Receiving Packets
RX MAC
TRANSMISSION STATUS
TXRETRY7:TXRETRY6: Retry Times bits
Defines the retry times of the most recent TXN FIFO transmission.
CCAFAIL: Clear Channel Assessment (CCA) Status of Last Transmission bit
1 = CCA failed
0 = CCA passed
Reserved: Maintain as ‘0’
R-0
TXSR: TX MAC STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
CCAFAIL
R-0
Advance Information
R-0
r
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
The behavior of RX FIFO follows a certain rule. When
a received packet is not filtered or dropped, a received
interrupt/status will be issued. The interrupt is
read-to-clear to save host operation time. However, the
RX FIFO is flushed only using the following three
methods:
• The host reads the first byte and the last byte to
• The host issues RX flush
• A software is reset
For RX filter function, the Promiscuous mode is
supported to receive all FCS-ok packets. An Error mode
is supported to receive all packets that successfully
correlated PHY level preamble and delimiter.
R-0
the packet
r
R-0
r
MRF24J40
x = Bit is unknown
R-0
r
DS39776A-page 31
R-0
r
bit 0