mrf24j40 Microchip Technology Inc., mrf24j40 Datasheet - Page 61
mrf24j40
Manufacturer Part Number
mrf24j40
Description
Ieee 802.15.4? 2.4 Ghz Rf Transceiver
Manufacturer
Microchip Technology Inc.
Datasheet
1.MRF24J40.pdf
(66 pages)
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© 2006 Microchip Technology Inc.
INDEX
A
Absolute Maximum Ratings ................................................41
AC Characteristics
B
Bill of Materials ...................................................................56
Block Diagrams
Buffer Interface ...................................................................17
C
CCA
Channel Selection ..............................................................24
Code Examples
Control Registers
COORD Bit .........................................................................24
CSMA-CA ...........................................................................29
Current Consumption .....................................................3, 42
Customer Change Notification Service ...............................61
Customer Notification Service ............................................61
Customer Support ..............................................................61
D
Device Configuration ..........................................................24
Device Overview ...................................................................3
Differential RF Pin
E
Electrical Characteristics ....................................................41
Errata ....................................................................................2
Example SPI Slave Mode Requirements ...........................43
Extended Organizationally Unique Identifier (EUI) .............20
External Connections ...........................................................7
Receiver .....................................................................42
Transmitter .................................................................43
Example Circuit ..........................................................47
Interrupt Logic .............................................................35
MRF24J40 Architecture ................................................4
Packet Format ............................................................19
Clear Channel Assessment ........................................30
GPIO Read/Write ........................................................39
Initializing the MRF24J40 ...........................................28
Long Address Read ....................................................16
Long Address Write ....................................................17
Short Address Read ...................................................14
Short Address Write ...................................................15
Long Address ...............................................................9
Mapping, Long Address ..............................................10
Mapping, Short Address .............................................10
Short Address ...............................................................9
Carrier Sense Multiple Access
Features (40-Pin Devices) ............................................3
Negative
Positive
CLKOUT Pin .................................................................7
Oscillator .......................................................................7
Collision Avoidance ............................................30
RFN ......................................................................8
RFP ......................................................................8
Start-up .................................................................7
Advance Information
G
General Purpose I/O .......................................................... 39
GPIO Registers
I
IEEE 802.15.4 ...................................................................... 3
IEEE 802.15.4-2003 ........................................................... 19
Impedance
Initialization ........................................................................ 21
Integrated Oscillator Drive .................................................... 3
Internet Address ................................................................. 61
Interrupts ............................................................................ 35
L
Layout Considerations ....................................................... 47
Long Address Register Interface ........................................ 16
Long Address Summary ..................................................... 11
Long Addresses ................................................................. 26
M
MAC Initialization ............................................................... 24
Memory Organization ........................................................... 9
Microchip Internet Web Site ............................................... 61
P
Packages ............................................................................. 3
Packaging .......................................................................... 45
Packet Format .................................................................... 19
PAN ID ............................................................................... 26
PANCOORD Bit ................................................................. 24
PCB
TRISGPIO
Measured ................................................................... 47
PCB Antenna ............................................................. 48
PCB Antenna in Smith Chart ...................................... 48
PCB Antenna with Voltage Standing
Simulated PCB Antenna, Smith Plot .......................... 51
Simulated PCB Antenna, XY Plot .............................. 50
Structure ..................................................................... 35
Reading ...................................................................... 16
Writing ........................................................................ 17
Details ........................................................................ 46
Marking ...................................................................... 45
Cyclic Redundancy Check (CRC) .............................. 19
Data Field ................................................................... 20
Data Payload .............................................................. 19
Destination Address ................................................... 19
Destination Address Fields ........................................ 20
FCS Field ................................................................... 20
Frame Control Field ................................................... 20
Frame Delimiter .......................................................... 20
Length Field ......................................................... 19, 20
Sequence Number Field ............................................ 20
Source Address .......................................................... 19
Source Address Fields ............................................... 20
Ground plane ............................................................. 53
Layout Design ............................................................ 52
Power Ground Plane .................................................. 53
GPIO Pin Direction and
Wave Ratio ........................................................ 49
SPI Mode Register ..................................... 40
MRF24J40
DS39776A-page 59