50s116t Ceramate Technical Co., Ltd., 50s116t Datasheet - Page 2

• Manufacturer Part Number: 50s116t
• Description: Sdram 512k X 2 Banks X 16 Bits Sdram
• Manufacturer: Ceramate Technical Co., Ltd.

* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:[phone]
Fax:[phone]
10. TIMING WAVEFORMS....................................................................................................................17
11. OPERATING TIMING EXAMPLE ....................................................................................................21
12. PACKAGE DIMENSIONS ................................................................................................................42
DC Characteristics..........................................................................................................................14
AC Characteristics ..........................................................................................................................15
Command Input Timing ..................................................................................................................17
Read Timing ...................................................................................................................................18
Control Timing of Input/Output Data ...............................................................................................19
Mode Reqister Set Cycle ................................................................................................................20
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3) ........................................................21
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto Precharge) .............................22
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3) ........................................................23
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto Precharge) .............................24
Interleaved Bank Write (Burst Length = 8) .....................................................................................25
Interleaved Bank Write (Burst Length = 8, Auto Precharge) ..........................................................26
Page Mode Read (Burst Length = 4, CAS Latency = 3) .................................................................27
Page Mode Read/Write (Burst Length = 8, CAS Latency = 3) .......................................................28
Auto Precharge Read (Burst Length = 4, CAS Latency = 3) ..........................................................29
Auto Precharge Write (Burst Length = 4) .......................................................................................30
Auto Refresh Cycle .........................................................................................................................31
Self Refresh Cycle ..........................................................................................................................32
Bust Read and Single Write (Burst Lenght = 4, CAS Latency = 3).................................................33
Power-down Mode ..........................................................................................................................34
Auto Precharge Timing (Read Cycle) .............................................................................................35
Auto Precharge Timing (Write Cycle) .............................................................................................36
Timing Chart of Write-to-Read Cycle (In the case of Burst Length = 4) .........................................37
Timing Chart of Burst Stop Cycle (Burst Stop Command) .............................................................37
Timing Chart of Burst Stop Cycle (Prechare Command)................................................................38
CKE/DQM Input Timing (Write Cycle) ............................................................................................39
CKE/DQM Input Timing (Read Cycle) ............................................................................................40
Self Refresh/Power-down Mode Exit Timing ..................................................................................41
50L-TSOP (II) 400 mill ....................................................................................................................42
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Http: www.ceramate.com.tw
50S116T
Rev 1.0 Aug.20,2002
SDRAM